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參數(shù)資料
| 型號： | PSD813FH |
| 英文描述： | Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器) |
| 中文描述： | 場可編程微控制器外圍設備與快閃記憶體（帶閃存的現(xiàn)場可編程微控制器） |
| 文件頁數(shù)： | 73/83頁 |
| 文件大?。?/td> | 369K |
| 代理商： | PSD813FH |
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Prelimnary
PSD813FN/FH
73
Appendix A –
Flash Memory
Description
The PSD813FN/FH has a non-volatile Flash memory that may be erased electrically at the
sector level, and programmed Byte-by-Byte.
Organization
The Flash Memory organization is 512K x 8 bits (only 128K x 8 is used) with Address lines
A0 – A18 and Data Inputs/Outputs D0 – D7. Memory control is provided by Chip Enable
(CSF), Output Enable (RDF) and Write Enable (WRF) Inputs.
Erase and Program are performed using embedded algorithms through the internal
Program/Erase Controller (P/E.C.).
Data Output bits D7 and D6 provide polling or toggle signals during Automatic Program or
Erase to indicate the Ready/Busy state of the internal Program/Erase Controller.
Sectors
Erasure of the memory is in sectors. There are 8 sectors of 64K bytes each in the memory
address space. Erasure of each sector takes typically 1.5 seconds and each sector can be
programmed and erased over 100,000 cycles. Sector erasure may be suspended, while
data is read from other blocks of the memory, and then resumed.
Bus Operations
Five operations can be performed by the appropriate bus cycles: Read Array, Read
Electronic Signature, Output Disable, Standby, and Write the Command of an Instruction.
Command Interface
Command Bytes can be written to a Command Interface (C.I.) latch to perform Reading
(from the Array or Electronic Signature), Erasure or programming. For added data
protection, command execution starts after 4 or 6 command cycles. The first, second, fourth
and fifth cycles are used to input a code sequence to the Command Interface. This
sequence is equal for all P/E.C. instructions. The command itself and its confirmation – if it
applies – are given on the third and fourth or sixth cycles.
Instructions
Seven instructions are defined to perform Reset, Read Electronic Signature, Auto Program,
Sector Auto Erase, Auto Bulk Erase, Sector Erase Suspend and Sector Erase Resume.
The internal Program/Erase Controller (P/E.C.) handles all timing and verification of the
Program and Erase instructions and provides Data Polling, Toggle, and Status data to
indicate completion of Program and Erase Operations.
Instructions are composed of up to six cycles. The first two cycles input a code sequence to
the Command Interface which is common to all P/E.C. instructions (see Table 4 for
Command Descriptions). The third cycle inputs the instruction set up command instruction
to the Command Interface. Subsequent cycles output Signature or the addressed data for
Read operations. For added data protection, the instructions for program and sector or bulk
erase require further command inputs. For a Program instruction, the fourth command cycle
inputs the address and data to be programmed. For an Erase instruction (sector or bulk),
the fourth and fifth cycles input a further code sequence before the Erase confirm command
on the sixth cycle. Byte programming takes typically 10μs while erase is performed in
typically 1.5 seconds.
Erasure of a memory sector may be suspended, in order to read data from another sector,
and then resumed. Data Polling, Toggle and Error data may be read at any time, including
during the programming or erase cycles, to monitor the progress of the operation. When
power is first applied or if V
CC
falls below V
LKO
, the command interface is reset to Read
Array.
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