參數(shù)資料
型號(hào): PSD601E1
英文描述: Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞(可編程邏輯,4K的位的SRAM,26我個(gè)可編程輸入/輸出,通用PLD的有63個(gè)輸入)
文件頁數(shù): 25/84頁
文件大小: 426K
代理商: PSD601E1
PSD6XXE1 Interface To a Multiplexed Bus
Figure 10 shows an example of a system using a microcontroller with a multiplexed
bus and a PSD6XXE1. The ADIO port on the PSD6XXE1 is connected directly to the
microcontroller address/data bus. The bus may be multiplexed only on one byte (eight-bit
data) or on both bytes (sixteen-bit data). The ALE latches the address lines internally;
latched addresses can be brought out to Port A or B. The PSD6XXE1 drives the ADIO data
bus only when one of its internal resources is accessed and the RD input is active.
PSD6XX Family
11-25
Bus Interface
(cont.)
M
C
W
R
B
A
R
A
A
A
A
O
A
P
P
A
P
B
P
C
W
R
B
R
A
P
(
(
P
Figure 10. An Example of a Typical Multiplexed Bus Interface,
8 or 16-Bit Data Bus
相關(guān)PDF資料
PDF描述
PSD602E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD603E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD612E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD613E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD703S5 Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯,4K位SRAM,27個(gè)可編程I/O,通用PLD有66個(gè)輸入)
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