參數(shù)資料
型號(hào)： PSD311L
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有12個(gè)輸入）
文件頁(yè)數(shù)： 6/18頁(yè)
文件大小： 179K
代理商： PSD311L
PSD3XX – Application Note 020
1-178
PSD3XX
Solution
for 16-Bit
Microcontroller
In this section, we will see how a single PSD302 is able to replace all the basic
building blocks as shown in the design example in Figure 1. As seen from the block
diagram (Figure 2), the PSD302 provides the following functional blocks:
K
64K bytes EPROM, as 64K x 8 or 32K x 16
K
2K bytes SRAM, as 2K x 8 or 1K x 16, expanding the microcontroller’s internal
scratch SRAM
K
Address latches/data buffers, bus interface to most microcontrollers.
K
Programmable Address Decoder (PAD); provides PAL type function:
18 inputs, 24 outputs and 40 product terms.
K
Port A: an 8–bit port, each bit can be configured as :
– I/O line
– latched address output (A0–A7)
– track AD0/AD7 as I/O lines in track mode for shared access.
– data port D0/D7 in non-multiplexed mode
– CMOS or open drain output
K
Port B: an 8-bit port, each bit can be configured as :
– I/O line
– chip select or logic replacement output from the PAD
– D8–D15 in non-multiplexed mode
– CMOS or open drain output
K
Port C: 3-bit port, each bit can be configured as input to or output from the PAD
K
Page Register: a 4-bit Page Register for bank switching
K
A19/CSI input pin for power down configuration
Figure 3 is the schematic of the design example with the PSD302. Not all the functions of
the PSD3XX are utilized in this example. The Page Register is not used since the INST
signal from the 80C196 can be easily included in the PAD for page decoding (for design
with the Page Register, see WSI Application Note 015). The internal EPROM and SRAM of
the PSD302 replaces U5, U6, and U7 in Figure 1. Port A is configured as an I/O port to
replace U3, the I/O latch. The PAD provides decoding functions for all the chip selects, as
well as the READY and BWIDTH inputs to the microcontroller. Please note the PSD302 is
able to provide a 16-bit SRAM for faster data accesses.
In this application the PSD302 is configured to operate in a 16-bit, multiplexed mode. The
PAL equations are programmed into the PAD. Depending on the particular bus cycle, the
PSD302 latches the microcontroller address, determines which device is to be enabled, and
provides data output for a read cycle. If it is an I/O bus cycle, either Port A is enabled or one
of the I/O_CS lines are activated. At the same time, the appropriate READY and BWIDTH
signals are generated.
相關(guān)PDF資料
PDF描述
PSD311 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
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相關(guān)代理商/技術(shù)參數(shù)
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PSD311L-15J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD311L-15JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD311L-15LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD311L-15LM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD311L-15U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
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