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參數(shù)資料
| 型號： | PSD311L |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有12個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，19余個可編程輸入/輸出，通用PLD的有12個輸入） |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 179K |
| 代理商： | PSD311L |
PSD3XX – Application Note 020
1-187
PSD3XX
Solution
for 16-Bit
Processor with
Non-Multiplexed
Bus
A PSD3XX can be configured to operate in the 16-bit mode with a non-multiplexed bus. In
this case, the microcontroller address lines A0–A15 are tied to AD0–AD15 inputs of the
PSD3XX; Port A and B of the PSD3XX are then configured as data ports, connecting to
data bus D0–D15. In applications where the EPROM space in a PSD3XX is not enough, or
a large amount of I/O lines and chip selects are needed, two PSD3XXs will provide a viable
solution. Connecting two PSD3XXs to a microcontroller needs special consideration.
Figure 5 shows a basic design of a 68302 microcontroller interfacing to two PSD312s. The
implementation is fairly straightforward; the two PSD302's are configured to work in 8-bit
non-multiplexed mode. The first PSD302 (U2) occupies the even bank of the memory space
of the 68302; the second PSD302 (U3) occupies the odd bank. The 68302 has no A0 in the
address bus; it depends on signals UDS and LDS (Upper and Lower Data Strobe) to control
the flow of data on the data bus as shown in Table 2.
UDS
LDS
D8–D15
D0–D7
Low
Low
Enabled
Enabled
Low
High
Enabled
Disabled
High
Low
Disabled
Enabled
High
High
Disabled
Disabled
Table 2. 68302 Byte Enable
The above table is also true for most other microcontrollers. Some use different signal
names, such as HBE for UDS and A0 is equivalent to LDS. The decoding for bank select is
the same for both cases. The following points must be considered when configuring the
PSD3XX for this type of application:
K
Address inputs to the PSD3XX have to shift right by one. Address line A1 connects to
AD0 pin of the PSD3XX and so on. For processors which have A0, A0 is no longer
used as address input.
K
Provide bank select signals to the appropriate PSD3XX for proper bank decoding.
The even bank PSD3XX must include signal LDS as input to the PAD, and the odd
bank PSD3XX requires the signal UDS. These signals can be connected to Port C or
the A19/CSI pin in order to be routed as PAD inputs.
K
While inside the PSDsoft software during PSDabel Design Entry, the address map
decode of the EPROM, SRAM and I/O port must also reflect the shift of the address
inputs.
K
The codes of the user’s program have to be split into two files, one for the even bank
PSD3XX and one for the odd bank PSD3XX.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD311 | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有12個輸入) |
| PSD312-15IB | Field-Programmable Peripheral |
| PSD312-20IB | Field-Programmable Peripheral |
| PSD313-90A | Hi-Rel Fixed Voltage Low Dropout 3-Terminal Negative Regulator; Qualified Part Number similar to OM2990-5STM |
| PSD313-90KA | Hi-Rel Fixed Voltage Low Dropout 3-Terminal Negative Regulator; A OM2990-5STM with Standard Packaging |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD311L-15J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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