- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368130 > PS9702B (Electronic Theatre Controls, Inc.) 6Ch, 24bit, 192kHz Digital Audio Processor for Full Digital Amplifier PDF資料下載
參數(shù)資料
| 型號(hào)： | PS9702B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 6Ch, 24bit, 192kHz Digital Audio Processor for Full Digital Amplifier |
| 中文描述： | 6通道，24位，192kHz的數(shù)字音頻處理器的全數(shù)字放大器 |
| 文件頁數(shù)： | 4/41頁 |
| 文件大?。?/td> | 505K |
| 代理商： | PS9702B |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁
PULSUS
PS9702B
Pin Descriptions
Name
Copyright 2000-2003, Pulsus Technologies Inc
.
4
2003 REV1.2
Pin NO.
Type
Description
Power and Ground
PLL_AVDD
6
Analog
Power
PLL analog power supply. 3.3V supply voltage.
PLL_AVSS
8
Analog
Ground
PLL analog ground.
PLL_DVDD
3
PLL
Power
PLL peripheral digital power supply. 3.3V supply voltage.
PLL_DVSS
2
PLL
Ground
PLL digital ground.
VDD
15, 24, 32, 40, 46,
51, 58, 65, 72, 77,
84, 90, 99
Power
Digital power supply. 3.3V supply voltage.
VSS
9, 16, 20, 25, 29,
33, 37, 41, 43, 47,
50, 52, 55, 59, 62,
66, 69, 73, 75, 78,
85, 89, 93, 100
Ground
Digital ground.
System Services
/RESET
92
I
H/W reset signal.
Active Low Schmitt-Trigger input.
The Schmitt-Trigger input allows a slowly rising input to reset
the chip reliably. The RESET signal must be asserted ‘Low’
during power up. De-assert ‘High’ for normal operation.
CLK_IN
86
I
External clock input. 12.288MHz is recommended.
When the PLL_BYPASS is “LOW”, the external clock input
from CLK_IN is used as PLL reference clock source. The
external oscillator generates 12.288MHz clock and the internal
PLL generates 98.304MHz (12.288MHz x 8) system clock.
When the PLL_BYPASS is “HIGH”, the PS9702B directly uses
the CLK_IN signal (98.304MHz clock) as system clock.
PLL_BYPASS
91
I
PLL bypass path selection input. Active High.
Internal pull-down resistor.
PLL_XPD
4
I
Internal PLL Power Down. Active Low.
Don't pull down "PLL_XPD" pin when PWM output is activated.
Internal pull-up resistor.
PLL_CPC
5
I
Internal PLL Charge Pump Current Selection input.
‘LOW’ for 100uA, ‘HIGH” for 50uA.
Internal pull-down resistor.
PLL_EXT_LPF
7
Analog
External PLL low pass filter pin.
PCM Audio Input/Output Interface
MBCK
13
I
PCM bit clock input of main six-channel audio.
Schmitt-Trigger input.
MLRCK
14
I
PCM Word clock (left-right clock) input of main six-channel
audio. Schmitt-Trigger input.
MSDIN[0:2]
12-10
I
PCM serial data input of main six-channel audio.
Schmitt-Trigger input.
SBCK[0:2]
18, 22, 27
I/O
PCM bit clock input/output of sub-channel audio.
User can select the master/slave mode of this signal.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PS9713E3 | Half Bridge Driver, Soft Turn-On, Single Input Plus Shut-Down, Fixed 500ns Deadtime in a 8-pin DIP package; A IR2302 packaged in a Lead-Free 8-Lead SOIC |
| PS9713E4 | IP2001; Similar to iP2001 with Lead Free packaging. |
| PS9814 | NECs 10 Mbps HIGH CMR OPEN COLLECTOR OUTPUT TYPE 8-PIN SOP HIGH-SPEED PHOTOCOUPLER |
| PS9814-1 | NECs 10 Mbps HIGH CMR OPEN COLLECTOR OUTPUT TYPE 8-PIN SOP HIGH-SPEED PHOTOCOUPLER |
| PS9814-2 | NECs 10 Mbps HIGH CMR OPEN COLLECTOR OUTPUT TYPE 8-PIN SOP HIGH-SPEED PHOTOCOUPLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PS9711 | 功能描述:高速光耦合器 Hi-Speed Digital Out RoHS:否 制造商:Avago Technologies 電流傳遞比: 最大波特率: 最大正向二極管電壓:1.75 V 最大反向二極管電壓:5 V 最大功率耗散:40 mW 最大工作溫度:+125 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-5 封裝:Tube |
| PS9711-E3 | 制造商:NEC 制造商全稱:NEC 功能描述:HIGH NOISE REDUCTION/HIGH-SPEED 10 Mbps, TOTEM-POLE OUTPUT TYPE 5-PIN SOP TOM PHOTOCOUPLER |
| PS9711-E4 | 制造商:NEC 制造商全稱:NEC 功能描述:HIGH NOISE REDUCTION/HIGH-SPEED 10 Mbps, TOTEM-POLE OUTPUT TYPE 5-PIN SOP TOM PHOTOCOUPLER |
| PS9711-F3 | 制造商:NEC 制造商全稱:NEC 功能描述:HIGH NOISE REDUCTION/HIGH-SPEED 10 Mbps, TOTEM-POLE OUTPUT TYPE 5-PIN SOP TOM PHOTOCOUPLER |
| PS9711-F4 | 制造商:NEC 制造商全稱:NEC 功能描述:HIGH NOISE REDUCTION/HIGH-SPEED 10 Mbps, TOTEM-POLE OUTPUT TYPE 5-PIN SOP TOM PHOTOCOUPLER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。