參數資料
型號： PS9702B
廠商： Electronic Theatre Controls, Inc.
英文描述： 6Ch, 24bit, 192kHz Digital Audio Processor for Full Digital Amplifier
中文描述： 6通道，24位，192kHz的數字音頻處理器的全數字放大器
文件頁數： 12/41頁
文件大小： 505K
代理商： PS9702B
PULSUS
PS9702B
Copyright 2000-2003, Pulsus Technologies Inc
.
12
2003 REV1.2
Control Register Descriptions
Register Name
Address
Word
Length
Description
DDC Soft Reset Register
DDC_RESET
0x00
2 Bytes
PWM output activation control register.
[0]: PWM modulator Reset control.
Default = “1”.
“0” = PWM On
“1” = PWM Off
[3:1]:
Reserved.
[4]: SRC (Sample Rate Converter) Lock indication. Active High. Read only.
“0” = Unlock (or No signal)
“1” = Lock
[8:5]: Input sample rate indication. Read only.
“0001” = 32KHz
“0010” = 44.1KHz
“0011” = 48KHz
“0110” = 88.2KHz
“0111” = 96KHz
“1010” = 176.4KHz
“1011” = 192KHz
[15:9]:
Not Used
.
Default = 0x0XX1
Input Interface Unit Configuration Registers
IN_CONTROL
0x01
2 Bytes
Serial data input interface control register.
[1:0]: BCK count.
Default = “10”.
“00” = 16bit, “01” = 24bit, “10” = 32bit.
[2]: BCK polarity.
Default = “1”.
“0” = Valid data at Negative edge
“1” = Valid data at Positive edge
[3]: Data align. “0” = Right aligned, “1” = Left aligned.
Default = “1”.
[4]: LRCK left high.
Default = “0”.
“0” = Right data when LRCK is high.
“1” = Left data when LRCK is high.
[5]: Data MSB first. “0” = LSB first, “1” = MSB first.
Default = “1”.
[7:6]: Data word length.
Default = “11”.
“00” = 16bit, “01” = 18bit, “10” = 20bit, “11” = 24bit.
[8]: I2S compatible. “1” = Compatible.
Default = “1”.
[15:9]:
Not Used
.
Default = 0x01EE
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