參數(shù)資料
型號(hào): PPC5604BCLL64
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 31/109頁(yè)
文件大小: 0K
描述: MCU 32BIT 512K 64MHZ
標(biāo)準(zhǔn)包裝: 90
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 64MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 4K x 16
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 28x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Package pinouts and signal descriptions
Freescale Semiconductor
28
PH[4]
PCR[116] AF0
AF1
AF2
AF3
GPIO[116]
E1UC[6]
SIUL
eMIOS_1
I/O
M
Tristate
134
A6
PH[5]
PCR[117] AF0
AF1
AF2
AF3
GPIO[117]
E1UC[7]
SIUL
eMIOS_1
I/O
S
Tristate
135
B6
PH[6]
PCR[118] AF0
AF1
AF2
AF3
GPIO[118]
E1UC[8]
MA[2]
SIUL
eMIOS_1
ADC
I/O
O
M
Tristate
136 D5
PH[7]
PCR[119] AF0
AF1
AF2
AF3
GPIO[119]
E1UC[9]
CS3_2
MA[1]
SIUL
eMIOS_1
DSPI_2
ADC
I/O
O
M
Tristate
137 C5
PH[8]
PCR[120] AF0
AF1
AF2
AF3
GPIO[120]
E1UC[10]
CS2_2
MA[0]
SIUL
eMIOS_1
DSPI_2
ADC
I/O
O
M
Tristate
138
A5
PH[9]9 PCR[121] AF0
AF1
AF2
AF3
GPIO[121]
TCK
SIUL
JTAGC
I/O
I
S
Input, weak
pull-up
60
88
127
B8
PH[10]9 PCR[122] AF0
AF1
AF2
AF3
GPIO[122]
TMS
SIUL
JTAGC
I/O
I
S
Input, weak
pull-up
53
81
120
B9
1 Alternate functions are chosen by setting the values of the PCR.PA bitfields inside the SIUL module.
PCR.PA = 00
AF0; PCR.PA = 01 AF1; PCR.PA = 10 AF2; PCR.PA = 11 AF3. This is intended to select
the output functions; to use one of the input functions, the PCR.IBE bit must be written to ‘1’, regardless of the
values selected in the PCR.PA bitfields. For this reason, the value corresponding to an input only function is
reported as “—”.
2 Multiple inputs are routed to all respective modules internally. The input of some modules must be configured by
setting the values of the PSMIO.PADSELx bitfields inside the SIUL module.
3 208 MAPBGA available only as development package for Nexus2+
4 All WKPU pins also support external interrupt capability. See wakeup unit chapter for further details.
5 NMI has higher priority than alternate function. When NMI is selected, the PCR.AF field is ignored.
6 “Not applicable” because these functions are available only while the device is booting. Refer to BAM chapter of
the reference manual for details.
Table 5. Functional port pin descriptions (continued)
Po
rt
pi
n
PCR
Alternate
function
1
Fu
nc
tio
n
Peripheral
I/O
d
irecti
o
n
2
Pa
d
type
RES
E
T
c
o
nfi
g
u
ra
tio
n
Pin number
MPC
560x
B
64
LQFP
MPC
560x
C
64
LQFP
10
0
L
QFP
14
4
L
QFP
208
MAPBGA
3
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