參數(shù)資料
型號: PNX3000
廠商: NXP Semiconductors N.V.
英文描述: Analog front end for digital video processors
中文描述: 模擬前端數(shù)字視頻處理器
文件頁數(shù): 15/51頁
文件大?。?/td> 285K
代理商: PNX3000
2004 Oct 04
15
Philips Semiconductors
Preliminary specification
Analog front end for digital video
processors
PNX3000
Table 2
Overview of data link modes
8
I
2
C-BUS SPECIFICATION
The slave addresses of the IC are given in Table 3. The circuit operates at clock frequencies of up to 400 kHz.
Table 3
Slave addresses (9A or 9E)
Bit A1 is controlled via the ADR pin, when the pin is connected to ground A1 = 0 and when connected to the positive
supply line A1 = 1. When this pin is left open it is connected to ground via an internal resistor.
8.1
Input control registers
Table 4
Input control registers; valid subaddresses: 00 to 0F; auto-increment mode available for subaddresses
Note
1.
The value of this bit cannot be changed.
MODE APPLICATION
DATA LINK 1
DATA LINK 2
DATA LINK 3
VIDEO1
AUDIO1
VIDEO2
AUDIO2
VIDEO3
TEST
0
1
standard
YUV 2f
H
input
CVBS/Y
prim
C
Y
yuv
L1
L1
R1
R1
Y
yuv
U
U,V
V
L2
L2
R2
R2
CVBS
sec
CVBS
sec
2nd SIF
2nd SIF
HV_P
HV_P
HV_S
HV_S
A6
A5
A4
A3
A2
A1
A0
R/W
1
0
0
1
1
A1
1
1/0
FUNCTION
SUB
ADDR
DATA BYTE
POR
VALUE
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0
Vision IF 0
Vision IF 1
IF PLL offset
IF tuner take over
IF PLL frequency
IF synthesizer
frequency
Filters
Data link mode
Video switches 0
Video switches 1
Video switches 2 and
audio mute
RGB switches
Audio switches ADC
Audio switches 0
Audio switches 1
IRQ mask status byte 0
00
01
02
03
04
05
AFN
IFON
IFGT
VA1
FXT
SF7
AFW
DSIF
VAI
VA0
IFA
SF6
IFS
DFIF
IFO5
TTO5
IFB
SF5
AGCM
DTV
IFO4
TTO4
IFC
SF4
FFI
IFLH
IFO3
TTO3
0
SF3
PMOD
SYNT
IFO2
TTO2
0
SF2
AGC1
SSIF
IFO1
TTO1
0
SF1
AGC0
QSS
IFO0
TTO0
0
SF0
00
00
20
20
80
00
06
07
08
09
0A
BPUV
DRND
SEC3
VIM
0
BPY
0
SEC2
VSW
MA2
BPP
0
SEC1
CMS
MA1
GD
HDTV
SEC0
CMP
MA0
SLPM
0
PRI3
CVA3
CVB3
BPS
0
PRI2
CVA2
CVB2
ST1
0
PRI1
CVA1
CVB1
ST0
DM
PRI0
CVA0
CVB0
00
00
00
36
76
0B
0C
0D
0E
0F
0
RSEL
SEA2
A1S2
M2G
IM6
MAT
SEA1
A1S1
AMX
IM5
DVD
SEA0
A1S0
M1G
IM4
0
0
CMR
PRA1
A0S1
A2S1
IM1
CLPS
PRA0
A0S0
A2S0
IM0
00
00
00
00
80
MONO
DSG
0
1
(1)
MNM1
MNM0
MICON
IM3
PRA2
A0S2
A2S2
IM2
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