參數(shù)資料
型號： PLUS405-55N
廠商： NXP SEMICONDUCTORS
元件分類： PLD
英文描述： Programmable logic sequencer 16 】 64 】 8
中文描述： OT PLD, 8 ns, PDIP28
封裝： 0.600 INCH, PLASTIC, DIP-28
文件頁數(shù)： 10/20頁
文件大小： 327K
代理商： PLUS405-55N
Philips Semiconductors
Product specification
PLUS405-37/-45
Programmable logic sequencers
(16
×
64
×
8)
1996 Nov 12
10
AC ELECTRICAL CHARACTERISTICS
(Continued)
R
1
= 470
, R
2
= 1k
, C
L
= 30pF, 0
°
C
≤
T
amb
≤
+75
°
C, 4.75V
≤
V
CC
≤
5.25V
LIMITS
SYMBOL
PARAMETER
FROM
TO
PLUS405-37
TYP
1
PLUS405-45
TYP
1
UNIT
MIN
MAX
MIN
MAX
Frequency of operation
f
MAX1
CLK1; without Complement Array
1
t
IS1
t
CKO1
Input
±
Output
±
37.0
45.5
45.5
55.6
MHz
f
MAX2
CLK2; without Complement Array
1
t
IS1
t
CKO2
Input
±
Output
±
33.0
41.7
41.7
50.0
MHz
f
MAX3
CLK1; with Complement Array
1
t
IS2
t
CKO1
Input thru
Complement
Array
±
Output
±
27.0
33.3
31.3
38.5
MHz
f
MAX4
CLK2; with Complement Array
1
t
IS2
t
CKO2
Input thru
Complement
Array
±
Output
±
25.0
31.3
29.4
35.7
MHz
f
MAX5
Internal feedback without
Complement Array (CLK1 or CLK2)
1
t
CKL
t
CKH
Register
Output
±
Register
Intput
±
50.0
62.5
58.8
72.4
MHz
f
MAX6
Internal feedback with
Complement Array (CLK1 or CLK2)
1
t
IS2
Register
Output thru
Complement
Array
±
Register
Intput
±
40.0
50.0
45.5
55.6
MHz
f
CLK
Minimum guaranteed clock
frequency
CK +
CK +
50.0
62.5
58.8
72.4
MHZ
NOTES:
1. All typical values are at V
CC
= 5V, T
amb
= +25
°
C.
2. For 3-State output; output enable times are tested with C
L
= 30pF to the 1.5V level, and S
1
is open for high-impedance to High tests and
closed for high-impedance to Low tests. Output disable times are tested with C
L
= 5pF. High-to-High impedance tests are made to an output
voltage of V
= (V
– 0.5V) with S
open, and Low-to-High impedance tests are made to the V
T
= (V
OL
+ 0.5V) level with S
1
closed.
3. All propagation delays and setup times are measured and specified under worst case conditions.
TEST LOAD CIRCUIT
+5V
C
L
R
1
R
2
S
1
GND
F7
F0
INPUTS
I0
I15
CK
OUTPUTS
C
2
C
1
DUT
NOTE:
C
1
and C
2
are to bypass V
CC
to GND.
V
CC
INIT/OE
SP00256
VOLTAGE WAVEFORMS
90%
10%
2.5ns
2.5ns
2.5ns
2.5ns
90%
10%
+3.0V
+3.0V
0V
0V
t
R
t
F
MEASUREMENTS:
All circuit delays are measured at the +1.5V level of inputs and outputs,
unless otherwise specified.
Input Pulses
SP00007
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