dsPIC33F
DS70165E-page 184
Preliminary
2007 Microchip Technology Inc.
REGISTER 15-1:
PTCON: PWM TIME BASE CONTROL REGISTER
R/W-0
U-0
R/W-0
U-0
PTEN
—PTSIDL
—
bit 15
bit 8
R/W-0
PTOPS<3:0>
PTCKPS<1:0>
PTMOD<1:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
PTEN: PWM Time Base Timer Enable bit
1
= PWM time base is on
0
= PWM time base is off
bit 14
Unimplemented: Read as ‘0’
bit 13
PTSIDL: PWM Time Base Stop in Idle Mode bit
1
= PWM time base halts in CPU Idle mode
0
= PWM time base runs in CPU Idle mode
bit 12-8
Unimplemented: Read as ‘0’
bit 7-4
PTOPS<3:0>: PWM Time Base Output Postscale Select bits
1111
= 1:16 postscale
0001
= 1:2 postscale
0000
= 1:1 postscale
bit 3-2
PTCKPS<1:0>: PWM Time Base Input Clock Prescale Select bits
11
= PWM time base input clock period is 64 TCY (1:64 prescale)
10
= PWM time base input clock period is 16 TCY (1:16 prescale)
01
= PWM time base input clock period is 4 TCY (1:4 prescale)
00
= PWM time base input clock period is TCY (1:1 prescale)
bit 1-0
PTMOD<1:0>: PWM Time Base Mode Select bits
11
=PWM time base operates in a Continuous Up/Down Count mode with interrupts for double
PWM updates
10
=PWM time base operates in a Continuous Up/Down Count mode
01
=PWM time base operates in Single Pulse mode
00
=PWM time base operates in a Free-Running mode