
191
8008H–AVR–04/11
ATtiny48/88
21. External Programming
This section describes how to program and verify Flash memory, EEPROM, lock bits, and fuse
bits in ATtiny48/88.
21.1
Memory Parametrics
Flash memory parametrics are summarised in
Table 21-1, below.
EEPROM parametrics are summarised in
Table 21-2, below.
21.2
Parallel Programming
Parallel programming signals and connections are illustrated in
Figure 21-1, below.
Figure 21-1. Parallel Programming Signals
Table 21-1.
Flash Parametrics
Device
Flash Size
Page Size
PCWORD
No. of
Pages
PCPAGE
PCMSB
ATtiny48
2K words
(4K bytes)
32 words
PC[4:0]
64
PC[10:5]
10
ATtiny88
4K words
(8K bytes)
32 words
PC[4:0]
128
PC[11:5]
11
Table 21-2.
EEPROM Parametrics
Device
EEPROM
Size
Page
Size
PCWORD
No. of
Pages
PCPAGE
EEAMSB
ATtiny48
64 bytes
4 bytes
EEA[1:0]
16
EEA[5:2]
5
ATtiny88
64 bytes
4 bytes
EEA[1:0]
16
EEA[5:2]
5
VCC
GND
CLKI
PD1
PD2
PD3
PD4
PD5
PD6
PC[1:0]:PB[5:0]
DATA
RESET
PD7
+12 V
BS1
XA0
XA1
OE
RDY/BSY
PAGEL
PC2
WR
BS2
AVCC
+4.5 - 5.5V