參數(shù)資料
型號： PIC16C765-I/L
廠商： Microchip Technology
文件頁數(shù)： 34/165頁
文件大?。?/td> 0K
描述： IC MCU OTP 8KX14 USB 44PLCC
產品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 27
系列： PIC® 16C
核心處理器： PIC
芯體尺寸： 8-位
速度： 24MHz
連通性： SCI，UART/USART，USB
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲器容量： 14KB（8K x 14）
程序存儲器類型： OTP
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 4.35 V ~ 5.25 V
數(shù)據轉換器： A/D 8x8b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
產品目錄頁面： 636 (CN2011-ZH PDF)
配用： AC164309-ND - MODULE SKT FOR PM3 44PLCC
ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
2000 Microchip Technology Inc.
Preliminary
DS41124C-page 129
PIC16C745/765
16.1
DC Characteristics:
PIC16C745/765 (Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°Cfor industrial
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
D001
VDD
Supply Voltage
4.35
—
5.25
V
D002*
VDR
RAM Data Retention
Voltage (Note 1)
—
1.5
—
V
D003
VPOR
VDD Start Voltage to ensure
internal Power-on Reset signal
—
VSS
—
V
See section on Power-on Reset for details
D004*
D004A*
SVDD
VDD Rise Rate to ensure
internal Power-on Reset signal
0.05
TBD
—
V/mS
PWRT enabled (PWRTE bit clear)
PWRT disabled (PWRTE bit set)
See section on Power-on Reset for details
D005
VBOR
Brown-out Reset
voltage trip point
3.65
—
4.35
V
Brown-out Reset is always active
D010
D013
IDD
Supply Current
(Note 2, 4)
—
14
18
16
20
mA
FINT = 24 MHz, VDD = 4.35V
FINT = 24 MHz, VDD = 5.25V
D020
D021
D021B
IPD
Power-down Current
(Note 3, 4)
—
90
100
120
140
A
VDD = 4.35V w/ USB suspended
VDD = 5.25V w/ USB suspended
D022*
D022A*
IWDT
IUSB
PLL
Module Differential
Current (Note 5, 6)
Watchdog Timer
Not suspend mode
Phase Lock Loop
—
6.0
40
1.5
20
180
3.0
A
mA
WDTE bit set, VDD = 4.35V
1A
FOSC
HS oscillator operating freq.
H4 oscillator operating freg.
EC oscillator operating freq.
E4 oscillator operating freq.
24
6
24
6
—
24
6
24
6
MHz
All temperatures
* These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1:
This is the limit to which VDD can be lowered without losing RAM data.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and
switching rate, oscillator type, internal code execution pattern and temperature also have an impact on the current
consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD,
MCLR = VDD; WDT enabled/disabled as specified.
3:
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with
the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4:
Timer1 oscillator (when enabled) adds approximately 20
A to the specification. This value is from characterization and is
for design guidance only. This is not tested.
5:
The
current is the additional current consumed when this peripheral is enabled. This current should be added to the
base IDD or IPD measurement.
6:
Module differential currents measured at FINT = 24 MHz.
745cov.book Page 129 Wednesday, August 2, 2000 8:24 AM
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