參數(shù)資料
型號: PIC16C54C
廠商: Microchip Technology Inc.
英文描述: EPROM/ROM-Based 8-Bit CMOS Microcontroller(18引腳、12個(gè)I/O端口、512位EPROM/ROM的8位CMOS微控制器)
中文描述: 存儲器/基于ROM的8位CMOS微控制器(18引腳,12個(gè)的I / O,512位存儲器端口/光盤的8位的CMOS微控制器)
文件頁數(shù): 117/158頁
文件大小: 1194K
代理商: PIC16C54C
2000 Microchip Technology Inc.
Preliminary
DS30453C-page 117
PIC16C54C/CR54C/C55A/C56A/CR56A/C57C/CR57C/C58B/CR58B
15.1
DC Characteristics: PIC16C54C/C55A/C56A/C57C/C58B-04, 20 (Commercial)
PIC16CR54C/CR56A/CR57C/CR58B-04, 20 (Commercial)
PIC16C54C/C55A/C56A/C57C/C58B-04I, 20I (Industrial)
PIC16CR54B/CR/54C/CR56A/CR57C/CR58B-04I, 20I (Industrial)
DC Characteristics
Power Supply Pins
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
0
°
C
T
A
+70
°
C (commercial)
40
°
C
T
A
+85
°
C (industrial)
Characteristic
Sym
Min
Typ
(1)
Max Units
Conditions
Supply Voltage
XT, RC, LP and HS options
HS option
RAM Data Retention Voltage
(2)
V
DD
start voltage to ensure
Power-on Reset
V
DD
rise rate to ensure
Power-on Reset
Supply Current
(3)(4)
V
DD
3.0
4.5
1.5*
V
SS
5.5
5.5
V
V
V
V
HS Option from 0 - 10MHz
HS Option from 0 - 20MHz
Device in SLEEP mode
See Section 7.4 for details on
Power-on Reset
V/ms See Section 7.4 for details on
Power-on Reset
mA
mA
mA
μ
A
F
OSC
= 32 kHz, V
DD
= 3.0V, LP mode,
Commercial
F
OSC
= 32 kHz, V
DD
= 3.0V, LP mode,
Industrial
μ
A
μ
A
μ
A
μ
A
V
DD
= 5.5V, WDT disabled, Industrial
μ
A
μ
A
μ
A
μ
A
V
DD
= 5.5V*, Industrial
V
DR
V
POR
S
VDD
0.05*
I
DD
1.8
2.6
4.5
14
17
2.4
3.6
16
32
40
μ
A
F
OSC
= 4 MHz, V
DD
= 5.5V, XT mode
F
OSC
= 10 MHz, V
DD
= 3.0V, HS mode
F
OSC
= 20 MHz, V
DD
= 5.5V, HS mode
Power-down Current
(5)
I
PD
0.25
0.25
1.8
2.0
3.75
3.75
8
10
4.0
5.0
7.0
8.0
8.0
9.0
20
22
V
DD
= 3.0V, WDT disabled, Commercial
V
DD
= 3.0V, WDT disabled, Industrial
V
DD
= 5.5V, WDT disabled, Commercial
Watchdog Timer Current
I
WDT
V
DD
= 3.0V, Commercial
V
DD
= 3.0V, Industrial
V
DD
= 5.5V*, Commercial
* These parameters are characterized but not tested.
Note 1:
Data in the Typical (
Typ
) column is based on characterization results at 25
°
C. This data is for design guidance
only and is not tested.
2:
This is the limit to which V
DD
can be lowered in SLEEP mode without losing RAM data.
3:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as bus
loading, oscillator type, bus rate, internal code execution pattern and temperature also have an impact on
the current consumption.
a) The test conditions for all I
DD
measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tristated, pulled to
V
SS
, T0CKI = V
DD
, MCLR = V
DD
; WDT enabled/disabled as specified.
b) For standby current measurements, the conditions are the same, except that
the device is in SLEEP mode.
4:
Does not include current through R
EXT
. The current through the resistor can be estimated by the
formula: I
R
= V
DD
/2R
EXT
(mA) with R
EXT
in k
.
5:
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to V
DD
and V
SS
.
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