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參數(shù)資料
| 型號： | PIC12F635T-I/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 26/74頁 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 1KX14 8SOIC |
| 產品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 3,300 |
| 系列： | PIC® 12F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 外圍設備： | 欠壓檢測/復位，POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 1.75KB（1K x 14） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大小： | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 帶卷 (TR) |
| 配用： | AC162057-ND - MPLAB ICD 2 HEADER 14DIP |
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Micrel, Inc.
KSZ8841-PMQL
October 2007
32
M9999-100407-1.5
Subsystem ID Register (CSID Offset 2CH)
The CSID register is a read-only 32-bit register. The content of the CSID is loaded from the EEPROM after hardware
reset. The loading period lasts at least 27,400 PCI cycles when the system is in 33MHz mode, and starts 50 cycles
after hardware reset desertion. If the host accesses the CSID before its content is loaded from the EEPROM, the
KSZ8841-PMQL responds with retry termination on the PCI bus.
The following table shows the CSID register bit fields.
Bit
Description
31 - 16
Subsystem ID
Indicates a 16-bit field containing the subsystem ID.
15 - 0
Subsystem Vendor ID
Indicates a 16-bit field containing the subsystem vendor ID.
The following table shows the access rules of the register.
Capabilities Pointer Register (CCAP Offset 34H)
The CCAP register points to the base address of the power management register block in the configuration address
space. This pointer is valid only if the new capability bit in CFCS is set.
The following table shows the CCAP register bit fields.
Bit
Default
Description
31 - 8
0x000000
Reserved
7 - 0
--
Capabilities Pointer
Points to the location of the power management register block in the PCI
configuration space. The value of this field is determined by the New
Capabilities bit 15 in the EEPROM. If this bit is set, the value of this field is
0x50, which stands for Support Power Management. Otherwise, this field
is read as 0x00.
Configuration Interrupt Register (CFIT Offset 3CH)
The CFIT register is divided into two sections: the interrupt line and the interrupt pin. CFIT configures both the system’s
interrupt and the KSZ8841-PMQL interrupt pin connection.
The following table shows the CFIT register bit fields.
Bit
Default
Description
31 - 24
0x28
MAX_LAT
This field indicates how often the device needs to gain access to the PCI
bus. Time unit is equal to 0.25 us, assuming a PCI clock frequency of 33
MHz. The value after a hardware reset is 0x28 (10 us).
23 - 16
0x14
MIN_GNT
This field indicates the burst period length that the device needs. Time unit
is equal to 0.25us, assuming a PCI clock frequency of 33 MHz. The value
after a hardware reset is 0x14 (5 us).
15 - 8
0x01
Interrupt Pin
Indicates which interrupt pin that the KSZ8841-PMQL uses. The KSZ8841-
PMQL uses INTA# and the read value is 0x01.
7 - 0
0x00
Interrupt Line
Category
Description
Value after hardware reset
Read from EEPROM.
Write access rules
Write has no effect on the KSZ8841-PMQL.
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