參數(shù)資料
型號(hào)： PIC12F635T-I/MF
廠商： Microchip Technology
文件頁(yè)數(shù)： 41/74頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH 1KX14 8DFN
標(biāo)準(zhǔn)包裝： 3,300
系列： PIC® 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 5
程序存儲(chǔ)器容量： 1.75KB（1K x 14）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大小： 128 x 8
RAM 容量： 64 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-VDFN 裸露焊盤(pán)
包裝： 帶卷 (TR)
配用： AC164324-ND - MODULE SKT FOR MPLAB 8DFN/16QFN
XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN
AC162057-ND - MPLAB ICD 2 HEADER 14DIP
XLT08DFN-ND - SOCKET TRANSITION ICE 8DFN
AC164032-ND - ADAPTER PICSTART PLUS 8DFN/DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
Micrel, Inc.
KSZ8841-PMQL
October 2007
46
M9999-100407-1.5
Power Management Capabilities Register (Offset 0x0218): PMCR
This register is a read-only register that provides information on the KSZ8841-PMQL power management capabilities.
These bits are automatically downloaded from the Configparam word of EEPROM, if pin EEEN is pulled high (enable
EEPROM). The PMCR register bits [15-0] are mirrored to CCID register bits [31-16].
Bit
Default
R/W
Description
15
0
RO
PME Support D3 (cold)
This bit is 0 only; the KSZ8841-PMQL does not support PME in
D3(cold) power state.
14
1
RO
PME Support D3 (hot)
This bit is 1 only, it is indicating that the KSZ8841-PMQL can assert
PME event (PMEN pin 14) in D3(hot) power state.
13
0
RO
PME Support D2
If this bit is set, the KSZ8841-PMQL asserts PME event (PMEN pin 14)
when the KSZ8841PMQL is in D2 power state and PME_EN (see bit8
in PMCS register) is set. Otherwise, the KSZ8841PMQL does not
assert PME event (PMEN pin 14) when the KSZ8841PMQL is in D2
power state.
The value of this bit is loaded from the PME_D2 bit in the EEPROM 0x6
word.
12
0
RO
PME Support D1
If this bit is set, the KSZ8841-PMQL asserts PME event (PMEN pin 14)
when the KSZ8841-PMQL is in D1 power state and PME_EN (see bit8
in PMCS register) is set. Otherwise, the KSZ8841M does not assert
PME event (PMEN pin 14) when the KSZ8841M is in D1 power state.
The value of this bit loaded from the PME_D1 bit in the EEPROM 0x6
word.
11
0
RO
PME Support D0
This bit is 0 only, it indicates that the KSZ8841-PMQL does not assert
PME event (PMEN pin 14) in D0 power state.
10
0
RO
D2 Support
If this bit is set, it indicates that the KSZ8841-PMQL support D2 power
state. The value of this bit is loaded from the D2_SUP bit in the
EEPROM 0x6 word.
(This bit is 0 only if without EEPROM).
9
0
RO
D1 Support
If this bit is set, it indicates that the KSZ8841-PMQL support D1 power
state. The value of this bit loaded from the D1_SUP bit in the EEPROM
0x6 word.
(This bit is 0 only if without EEPROM).
8 - 6
000
RO
Auxiliary Current
This 3-bit field reports the 3.3Vaux auxiliary current requirements for the
PCI function. If PME# generation from D3_cold is not supported by the
function, this field must return a value of 000 when read.
5
0
RO
Device Specific Initialization
Indicates whether special initialization of this function is required
(beyond the standard PCI configuration header) before the generic
class device driver is able to use it.
Note that this bit is not used by some operating systems. Microsoft
Windows and Windows NT, for instance, do not use this bit to
determine whether to use D3. Instead, they use the driver’s capabilities
to determine this.
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