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| 型號： | PIC12F635T-I/MF |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 37/74頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 1KX14 8DFN |
| 標(biāo)準包裝： | 3,300 |
| 系列： | PIC® 12F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 1.75KB（1K x 14） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-VDFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 配用： | AC164324-ND - MODULE SKT FOR MPLAB 8DFN/16QFN XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN AC162057-ND - MPLAB ICD 2 HEADER 14DIP XLT08DFN-ND - SOCKET TRANSITION ICE 8DFN AC164032-ND - ADAPTER PICSTART PLUS 8DFN/DIP AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
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Micrel, Inc.
KSZ8841-PMQL
October 2007
42
M9999-100407-1.5
Bit
Default
Read/
Write
Description
Asserted when the DMA MAC transmit process enters the stopped
state.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
25
0
RW
DMRPSS DMA MAC Receive Process Stopped Status
Asserted when the DMA MAC receive process enters the stopped
state.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
24 - 0
-
RO
Reserved
MAC Additional Station Address Low Register (MAAL0-15)
The KSZ8841-PMQLsupports 16 additional MAC addresses for MAC address filtering. This MAC address is used to
define one of the 16 destination addresses that the KSZ8841-PMQL will respond to when receiving frames on the port.
Network addresses are generally expressed in the form of 01:23:45:67:89:AB, where the bytes are received left to right,
and the bits within each byte are received right to left (LSB to MSB). The actual transmitted and received bits are in the
order of 10000000 11000100 10100010 11100110 10010001 11010101.
The following table shows the register bit fields.
Bit
Default
Read/
Write
Description
31 - 0
--
RW
MAAL0 MAC Additional Station Address 0 Low 4 bytes
The least significant word of the additional MAC 0 station address.
MAC Additional Station Address High Register (MAAH0-15)
The KSZ8841-PMQL supports 16 additional MAC addresses for MAC address filtering. This MAC address is used to
define one of the 16 destination addresses that the KSZ8841-PMQL will respond to when receiving frames on the port.
Network addresses are generally expressed in the form of 01:23:45:67:89:AB, where the bytes are received left to right,
and the bits within each byte are received right to left (LSB to MSB). The actual transmitted and received bits are in the
order of 10000000 11000100 10100010 11100110 10010001 11010101.
The following table shows the register bit fields.
Bit
Default
Read/
Write
Description
31
0
RW
MAA0E MAC Additional Station Address 0 Enable
When set, the additional MAC address is enabled for received frames.
When reset, the additional MAC address is disabled.
30 - 16
0x0
RO
Reserved
15 - 0
--
RW
MAAH0 MAC Additional Station Address 0 High 2 bytes
The most significant word of the additional MAC 0 station address.
The following table shows the register map for all 16 additional MAC address registers.
Register
IDENTIFIER
OFFSET
ADD MAC Low 0
MAAL0
0x0080
ADD MAC High 0
MAAH0
0x0084
ADD MAC Low 1
MAAL1
0x0088
ADD MAC High 1
MAAH1
0x008C
ADD MAC Low 2
MAAL2
0x0090
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