參數(shù)資料
型號(hào)： PIC12F1822-I/P
廠商： Microchip Technology
文件頁(yè)數(shù)： 69/109頁(yè)
文件大小： 0K
描述： IC MCU 8BIT FLASH 8PDIP
產(chǎn)品培訓(xùn)模塊： 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 60
系列： PIC® XLP™ 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 32MHz
連通性： I²C，LIN，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 6
程序存儲(chǔ)器容量： 3.5KB（2K x 14）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-DIP（0.300"，7.62mm）
包裝： 管件
253
7674F–AVR–09/09
ATmega164P/324P/644P
21.7.2
Analog Noise Canceling Techniques
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of
analog measurements. If conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
a.
Keep analog signal paths as short as possible. Make sure analog tracks run over the
analog ground plane, and keep them well away from high-speed switching digital
tracks.
b.
The AVCC pin on the device should be connected to the digital V
CC supply voltage
via an LC network as shown in Figure 21-9.
c.
Use the ADC noise canceler function to reduce induced noise from the CPU.
d.
If any ADC port pins are used as digital outputs, it is essential that these do not
switch while a conversion is in progress.
Figure 21-9. ADC Power Connections
21.7.3
Offset Compensation Schemes
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by selecting the same channel for both differential inputs. This offset residue can be then
subtracted in software from the measurement results. Using this kind of software based offset
correction, offset on any channel can be reduced below one LSB.
GND
VCC
P
A0
(ADC0)
P
A1
(ADC1)
P
A2
(ADC2)
P
A3
(ADC3)
PA4 (ADC4)
PA5 (ADC5)
PA6 (ADC6)
PA7 (ADC7)
AREF
AVCC
GND
PC7
10
μ
H
100nF
Analog
Ground
Plane
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