參數(shù)資料
型號: PIC12F1822-I/P
廠商: Microchip Technology
文件頁數(shù): 16/109頁
文件大?。?/td> 0K
描述: IC MCU 8BIT FLASH 8PDIP
產品培訓模塊: 8-bit PIC® Microcontroller Portfolio
標準包裝: 60
系列: PIC® XLP™ 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 32MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據轉換器: A/D 4x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
205
7674F–AVR–09/09
ATmega164P/324P/644P
18.7
AVR USART MSPIM vs. AVR SPI
The USART in MSPIM mode is fully compatible with the AVR SPI regarding:
Master mode timing diagram.
The UCPOLn bit functionality is identical to the SPI CPOL bit.
The UCPHAn bit functionality is identical to the SPI CPHA bit.
The UDORDn bit functionality is identical to the SPI DORD bit.
However, since the USART in MSPIM mode reuses the USART resources, the use of the
USART in MSPIM mode is somewhat different compared to the SPI. In addition to differences of
the control register bits, and that only master operation is supported by the USART in MSPIM
mode, the following features differ between the two modules:
The USART in MSPIM mode includes (double) buffering of the transmitter. The SPI has no
buffer.
The USART in MSPIM mode receiver includes an additional buffer level.
The SPI WCOL (Write Collision) bit is not included in USART in MSPIM mode.
The SPI double speed mode (SPI2X) bit is not included. However, the same effect is achieved
by setting UBRRn accordingly.
Interrupt timing is not compatible.
Pin control differs due to the master only operation of the USART in MSPIM mode.
A comparison of the USART in MSPIM mode and the SPI pins is shown in Table 18-3 on page
Table 18-3.
Comparison of USART in MSPIM mode and SPI pins.
USART_MSPIM
SPI
Comment
TxDn
MOSI
Master Out only
RxDn
MISO
Master In only
XCKn
SCK
(Functionally identical)
(N/A)
SS
Not supported by USART in MSPIM
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