參數(shù)資料
型號: PIC12F1501-I/MF
廠商: Microchip Technology
文件頁數(shù): 3/33頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 1.75KB FLASH 8-DFN
標準包裝: 120
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 1.75KB(1K x 14)
程序存儲器類型: 閃存
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-VDFN 裸露焊盤
包裝: 管件
2011 Microchip Technology Inc.
Preliminary
DS41615A-page 11
PIC12(L)F1501
TABLE 1-2:
PIC12(L)F1501 PINOUT DESCRIPTION
Name
Function
Input
Type
Output
Type
Description
RA0/AN0/C1IN+/DACOUT1/
CWG1B(1)/CLC2IN1/PWM2/
ICSPDAT
RA0
TTL
CMOS General purpose I/O.
AN0
AN
A/D Channel input.
C1IN+
AN
Comparator positive input.
DACOUT1
AN
Digital-to-Analog Converter output.
CWG1B
CMOS CWG complementary output.
CLC2IN1
ST
Configurable Logic Cell source input.
PWM2
CMOS Pulse Width Module source output.
ICSPDAT
ST
CMOS ICSP Data I/O.
RA1/AN1/VREF+/C1IN0-/
NCO1(1)/CLC2IN0/ICSPCLK
RA1
TTL
CMOS General purpose I/O.
AN1
AN
A/D Channel input.
VREF+
AN
A/D Positive Voltage Reference input.
C1IN0-
AN
Comparator negative input.
NCO1
CMOS Numerically Controlled Oscillator output.
CLC2IN0
ST
Configurable Logic Cell source input.
ICSPCLK
ST
ICSP Programming Clock.
RA2/AN2/C1OUT/DACOUT2/
T0CKI/INT/PWM1/CLC1(1)/
CWG1A(1)/CWG1FLT
RA2
ST
CMOS General purpose I/O.
AN2
AN
A/D Channel input.
C1OUT
CMOS Comparator output.
DACOUT2
AN
Digital-to-Analog Converter output.
T0CKI
ST
Timer0 clock input.
INT
ST
External interrupt.
PWM1
CMOS Pulse Width Module source output.
CLC1
CMOS Configurable Logic Cell source output.
CWG1A
CMOS CWG complementary output.
CWG1FLT
ST
Complementary Waveform Generator Fault input.
RA3/CLC1IN0/VPP/T1G(2)/MCLR
RA3
TTL
General purpose input.
CLC1IN0
ST
Configurable Logic Cell source input.
VPP
HV
Programming voltage.
T1G
ST
Timer1 Gate input.
MCLR
ST
Master Clear with internal pull-up.
RA4/AN3/C1IN1-/CWG1B(2)/
CLC1(2)/PWM3/CLKOUT/T1G(1)
RA4
TTL
CMOS General purpose I/O.
AN3
AN
A/D Channel input.
C1IN1-
AN
Comparator negative input.
CWG1B
CMOS CWG complementary output.
CLC1
CMOS Configurable Logic Cell source output.
PWM3
CMOS Pulse Width Module source output.
CLKOUT
CMOS FOSC/4 output.
T1G
ST
Timer1 Gate input.
Legend: AN = Analog input or output CMOS= CMOS compatible input or output
OD
= Open Drain
TTL = TTL compatible input
ST
= Schmitt Trigger input with CMOS levels I2C = Schmitt Trigger input with I2C
HV = High Voltage
XTAL = Crystal
levels
Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register.
2: Alternate location for peripheral pin function selected by the APFCON register.
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