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參數(shù)資料
| 型號： | PIC10F202T-I/PG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 4 MHz, RISC MICROCONTROLLER, PDIP8 |
| 封裝： | 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-8 |
| 文件頁數(shù)： | 36/88頁 |
| 文件大小： | 1127K |
| 代理商： | PIC10F202T-I/PG |
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2004 Microchip Technology Inc.
Preliminary
DS41239A-page 39
PIC10F200/202/204/206
8.2
Comparator Operation
A single comparator is shown in Figure 8-2 along with
the relationship between the analog input levels and
the digital output. When the analog input at VIN+ is less
than the analog input VIN-, the output of the comparator
is a digital low level. When the analog input at VIN+ is
greater than the analog input VIN-, the output of the
comparator is a digital high level. The shaded areas of
the output of the comparator in Figure 8-2 represent
the uncertainty due to input offsets and response time.
See Table 12-1 for Common Mode Voltage.
FIGURE 8-2:
SINGLE COMPARATOR
8.3
Comparator Reference
An internal reference signal may be used depending on
the comparator operating mode. The analog signal that
is present at VIN- is compared to the signal at VIN+ and
the digital output of the comparator is adjusted
accordingly (Figure 8-2). Please see Table 12-1 for
internal reference specifications.
8.4
Comparator Response Time
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output is to have a valid level. If the com-
parator inputs are changed, a delay must be used to
allow the comparator to settle to its new state. Please
see
for
comparator
response
time
specifications.
8.5
Comparator Output
The comparator output is read through CMCON0
register. This bit is read-only. The comparator output
may also be used internally, see Figure 8-1.
8.6
Comparator Wake-up Flag
The comparator wake-up flag is set whenever all of the
following conditions are met:
CWU = 0 (CMCON0 <0>)
CMCON0 has been read to latch the last known
state of the CMPOUT bit (MOVF CMCON0, W)
Device is in Sleep
The output of the comparator has changed state
The wake-up flag may be cleared in software or by
another device Reset.
8.7
Comparator Operation During
Sleep
When the comparator is active and the device is placed
in Sleep mode, the comparator remains active. While
the comparator is powered-up, higher Sleep currents
than shown in the power-down current specification will
occur. To minimize power consumption while in Sleep
mode, turn off the comparator before entering Sleep.
8.8
Effects of a Reset
A POR Reset forces the CMCON0 register to its Reset
state. This forces the Comparator module to be in the
comparator Reset mode. This ensures that all potential
inputs are analog inputs. Device current is minimized
when analog inputs are present at Reset time. The
comparator will be powered-down during the Reset
interval.
8.9
Analog Input Connection
Considerations
A simplified circuit for an analog input is shown in
Figure 8-3. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. The analog input therefore, must be between
VSS and VDD. If the input voltage deviates from this
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up may occur. A
maximum
source
impedance
of
10 k
is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
–
+
Vin+
Vin-
Result
VIN-
VIN+
Note:
Analog levels on any pin that is defined as
a digital input may cause the input buffer to
consume more current than is specified.
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