參數(shù)資料
型號(hào): PIC10F202T-I/PG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 4 MHz, RISC MICROCONTROLLER, PDIP8
封裝: 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-8
文件頁(yè)數(shù): 13/88頁(yè)
文件大?。?/td> 1127K
代理商: PIC10F202T-I/PG
PIC10F200/202/204/206
DS41239A-page 18
Preliminary
2004 Microchip Technology Inc.
4.3.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
TABLE 4-1:
SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC10F200/202/204/206)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-On
Reset(2)
Page #
00h
INDF
Uses Contents of FSR to Address Data Memory (not a physical register)
xxxx xxxx
01h
TMR0
8-bit Real-Time Clock/Counter
xxxx xxxx
02h(1)
PCL
Low-order 8 bits of PC
1111 1111
03h
STATUS
GPWUF
CWUF(5)
—TO
PD
ZDC
C
00-1 1xxx
(3)
04h
FSR
Indirect Data Memory Address Pointer
111x xxxx
05h
OSCCAL
CAL6
CAL5
CAL4
CAL3
CAL2
CAL1
CAL0
FOSC4
1111 1110
06h
GPIO
GP3
GP2
GP1
GP0
---- xxxx
07h(4)
CMCON0
CMPOUT COUTEN
POL
CMPT0CS
CMPON
CNREF
CPREF
CWU
1111 1111
N/A
TRISGPIO
I/O Control Register
---- 1111
N/A
OPTION
GPWU
GPPU
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
Legend:
— = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.
Note
1:
The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an
explanation of how to access these bits.
2:
Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change
Reset.
3:
See Table 9-1 for other Reset specific values.
4:
PIC10F204/206 only.
5:
PIC10F204/206 only. On all other devices, this bit is reserved and should not be used.
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