參數(shù)資料
型號: PI2EQX5804CNJE
廠商: Pericom
文件頁數(shù): 1/23頁
文件大?。?/td> 0K
描述: IC PCI-E REDRIVER 100LBGA
標(biāo)準(zhǔn)包裝: 176
系列: ReDriver™
類型: 轉(zhuǎn)接驅(qū)動器
Tx/Rx類型: CML
電容 - 輸入: 50pF
電源電壓: 1.15 V ~ 1.25 V
電流 - 電源: 800mA
安裝類型: 表面貼裝
封裝/外殼: 100-BGA
供應(yīng)商設(shè)備封裝: 100-LBGA(11x11)
包裝: 托盤
1
PS8926B
06/08/09
Block Diagram
PI2EQX5804C
5.0Gbps 4-Lane PCIe 2.0 ReDriver
with Equalization & Emphasis
Features
Up to 5.0Gbps PCIe 2.0 Serial ReDriver
Supporting 8 differential channels or 4 lanes of PCIe Interface
Pin strapped and I2C conguration controls
Adjustable receiver equalization
Adjustable transmitter amplitude and de-emphasis
Variable input an output termination
1:2 channel broadcast
Channel loop-back
Electrical Idle fully supported
Receiver detect and individual output control
Single supply voltage, 1.2V ± 0.05V
Power down modes
Packaging: 100-contact LBGA, Pb-free & Green
Description
Pericom Semiconductor’s PI2EQX5804C is a low power, PCIe
compliant signal ReDriver. The device provides programmable
equalization, amplication, and de-emphasis by using 8 select
bits, to optimize performance over a variety of physical mediums
by reducing Inter-symbol interference.
PI2EQX5804C supports eight 100-Ohm Differential CML
data I/O’s between the Protocol ASIC to a switch fabric, across
a backplane, or extends the signals across other distant data
pathways on the user’s platform.
The integrated equalization circuitry provides exibility with
signal integrity of the PCIe signal before the ReDriver, whereas
the integrated de-emphasis circuitry provides exibility with
signal integrity of the signal after the ReDriver.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX5804C also provides power management Stand-by mode
operated by a Power Down pin.
Pin Conguration (Top-Side View)
1
2
3
4
5
6
7
89
10
A VDD
B0TX-
B0TX+
VDD
SCL
SDA
VDD
B0RX+
B0RX-
VDD
B A1RX+
GND
A0RX -
DE_A
VDD
A0TX-
GND
A1TX+
C A1RX-
GND
A0RX+
NC
PD#
A0TX+
GND
A1TX-
D
VDD
B1TX+ B1TX-
VDD
D2_A
VDD
B1RX-
B1RX+ VDD
E SEL0_A SEL1_A SEL2_A D0_A
D1_A
S0_A
RXD_A S1_A
SIG_A RX50_A
F RX50_B SIG_B S1_B
RXD_B
S0_B
A1
SEL2_B
LB#
SEL1_B SEL0_B
G
VDD
A2RX-
A2RX+
VDD
MODE D0_B
VDD
A2TX+
A2TX -
VDD
H B2TX+ GND
GND
B3TX-
DE_B
A0
B3RX-
GND
B2RX+
J B2TX-
GND
B3TX+ RESET# D1_B
B3RX+
GND
B2RX-
K
VDD
A3RX+
A3RX-
VDD
D2_B
A4
VDD
A3TX-
A3TX+
VDD
NC
+
+
+
+
+
+
A
B
xyRx+
xyRx-
xyTx+
xyTx-
xyTx+
xyRx+
xyRx-
Equalizer
Inputleveldetect
tocontrollogic
Output
Controls
Output
Controls
Inputleveldetect
tocontrollogic
DataLaneRepeats4Times
Controlregisters
&logic
Power
Management
I2CControl
SELy_x
Sy_x
Dy_x
DE_x
PD#
SDA
SCL
Mode
LB#
RES_x
RXD_x
Ax
09-0001
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