參數(shù)資料
型號： PG-FP4
英文描述： PG-FP4 Flash Memory Programmer | User＇s Manual[03/2003]
中文描述： 指引FP4閃存編程|用戶手冊[03/2003]
文件頁數(shù)： 85/117頁
文件大小： 1599K
代理商： PG-FP4
CHAPTER 6 PG-FP4 OPERATION IN STANDALONE MODE
User’s Manual U15260EJ3V1UM
85
6.1.2
[Type Setting] menu
The [Type Setting] menu is used to check the target device rewrite environment currently set for the PG-FP4. All
the values displayed were set during the last programming session.
The setting cannot be changed by this menu.
[Type Setting >]
Pressing the Next key displays the [Option Setting] menu.
Pressing the Enter key displays the following commands that can be executed from the [Type Setting] menu.
Pressing the Cancel key displays the [Commands] menu again.
[
Device Port
]
Device Port displays any of the following to indicate what is selected as an interface between
the target device and the PG-FP4.
SIO 0, SIO1, SIO 2, SIO H/S, IIC 0, IIC 1, IIC 2, IIC 3,
UART 0, UART 1, UART 2, UART 3, PORT 0, PORT 1, PORT 2
↓
Next button
[
Multiply Rate
]
↓
Next button
[
Serial CLK
]
Multiply Rate displays the multiplication rate of the operating clock of the target device.
Serial CLK displays the serial clock rate in Hz that is used to interface the target device and
PG-FP4.
↓
Next button
[
CLK source
]
CLK source indicates either of the following as a source to supply the operation clock to the
target device.
Programmer: Clock is supplied from the PG-FP4.
Target:
Clock is supplied on the user system.
↓
Next button
[
PG CPU CLK
]
↓
Next button
[
Target CPU CLK
] Target CPU CLK indicates the frequency of the clock on the user system that is supplied to
the target device, in MHz.
↓
Next button
[
Mode
]
Mode indicates any of the following operation modes when the Blank Check, Erase,
Program, Verify, or EPV command is executed.
chip, area, block
Display example
Mode
BEPV: chip
↓
Next button
[
PRG Area
]
PRG Area indicates which of the areas of the target device connected to the PG-FP4 is to be
programmed. This menu is valid only when the operation mode is other than chip (only when
area or block is displayed in the above mode).
Display example
PRG Area
0 to 1
*In the chip mode, the display is always as follows:
PRG Area
0 to 0
PG CPU CLK indicates the frequency of the clock supplied by the PG-FP4 in MHz.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PG-FP4-E 功能描述:PROGRAMMER FLASH MEMORY UNIV RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:* 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:*
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