參數(shù)資料
型號: PDTB114ET
廠商: NXP SEMICONDUCTORS
元件分類: 小信號晶體管
英文描述: PNP resistor-equipped transistor
中文描述: 500 mA, 50 V, PNP, Si, SMALL SIGNAL TRANSISTOR
封裝: SOT-23, 3 PIN
文件頁數(shù): 2/8頁
文件大?。?/td> 50K
代理商: PDTB114ET
1997 Sep 02
2
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
PDTB114ET
FEATURES
Built-in bias resistors R1 and R2
(typ. 10 k
each)
Simplification of circuit design
Reduces number of components
and board space.
APPLICATIONS
Especially suitable for space
reduction in interface and driver
circuits
Inverter circuit configurations
without use of external resistors.
DESCRIPTION
PNP resistor-equipped transistor in a
SOT23 plastic package.
NPN complement: PDTD114ET.
PINNING
PIN
DESCRIPTION
1
2
3
base/input
emitter/ground (+)
collector/output
Fig.1 Simplified outline (SOT23) and symbol.
handbook, 4 columns
2
1
3
MAM100
Top view
R1
R2
3
2
1
Fig.2
Equivalent inverter
symbol.
MGA893 - 1
1
3
2
MARKING
TYPE
NUMBER
MARKING
CODE
PDTB114ET
p09
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
50
500
500
250
13
UNIT
V
CEO
I
O
I
CM
P
tot
h
FE
R1
collector-emitter voltage
output current (DC)
peak collector current
total power dissipation
DC current gain
input resistor
open base
56
7
10
V
mA
mA
mW
T
amb
25
°
C
I
C
=
50 mA; V
CE
=
5 V
k
resistor ratio
0.8
1
1.2
R1
R2
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