參數(shù)資料
型號: PCM66P
英文描述: 16-Bit CMOS Monolithic Audio DIGITAL-TO-ANALOG CONVERTER
中文描述: 16位CMOS單片音頻數(shù)字模擬轉換器
文件頁數(shù): 5/7頁
文件大?。?/td> 92K
代理商: PCM66P
PCM66P
5
FIGURE 2. PCM66P Block Diagram.
FIGURE 3. PCM66P Connection Diagram.
TWO DAC TWO-CHANNEL OPERATION
In phase, two-channel output can be obtained by using two
PCM66Ps and choosing the single DAC mode (setting SDM
SEL high). With the use of a high or low input level on
LRDAC (P left/right DAC select), each DAC can have its
right channel output dedicated to either left or right data
input with no additional input signals being required to latch
the appropriate data from an alternating L/R data word input
stream. In the single DAC mode, the PCM66P’s left channel
output is disabled and held at +V
. In this mode both
DACs share common inputs for DATA, CLK, WDCLK, and
LRCLK. Otherwise circuit connection is the same as the
two-channel DAC mode, with the exception of LRDAC
whose level selects whether the single DAC will output
dedicated left or right channel data.
INTEGRATE AND HOLD OUTPUT AMPLIFIERS
The PCM66P incorporates integrate and hold amplifiers on
each output channel. This allows a single, very fast DAC to
feed both amplifiers and reduce circuit complexity. It also
serves to block the output glitch from the DAC to the
individual channel outputs and effectively makes the PCM66P
outputs “glitch-free.” The PCM66P is a single +5V supply
device with a voltage output swing of 2.8Vp-p. The outputs
swing asymmetrically around V
(+V
– 2.33V). See
Table II for exact input/output relationships. Since true
CMOS amplifiers are used on the PCM66P, the load resis-
tance on the outputs should not be less than 100k
and the
capacitive loads should not exceed 100pF. For maximum
low-distortion performance, output buffer amplifiers should
be considered.
+
+
+
Reference
+
16-Bit Input
Data Latch
16-Bit D/A
Converter
Serial/Parallel
Shift Register
M
DATA
SDM SEL
LRDAC
LRCLK
WDCLK
CLK
LCH
V
OUT
V
R CH
V
OUT
+V
SEN
10k
20k
20k
30k
4k
30k
0–3.5V
CC
4k
COM
+V
CC
V
REF
C
REF
V
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
LRCLK
WDCLK
CLK
DATA
NC
D
A
L CH Out
V
R CH Out
Mode 2
Mode 1
+V
+V
+V
V
REF
V SEN
C
REF
+V
+V
CC
CC
CC
CC
CC
330pF
C
REF
+V
CC
+5V
330pF
COM
COM
COM
C
COM
3.3μF
10μF
0.1μF
Digital
Input
Mode Select
L CH Out
R CH Out
100μF
+
PCM66P
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