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參數(shù)資料
| 型號(hào)： | PCM3001E |
| 元件分類： | Codec |
| 英文描述： | Stereo Audio CODEC 18-BITS, SERIAL INTERFACE TM |
| 中文描述： | 立體聲音頻編解碼器18位，串行接口商標(biāo) |
| 文件頁數(shù)： | 19/21頁 |
| 文件大小： | 212K |
| 代理商： | PCM3001E |
19
PCM3000/3001
FIGURE 13. Typical Connection Diagram for PCM3000/3001.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
470pF
470pF
+
4.7μF
4.7μF
+
2.2μF
(2)
+
2.2μF
(2)
+
10 to 33pF
10μF
+
Register Control
Interface
Reference
Bias
Analog
Front-End
Decimation
Filter
Interpolation
Filter
LPF and
Buffer
LPF and
Buffer
Digital
Audio
Interface
Analog
Front-End
CLK/OSC
Manager
Delta-Sigma
Delta-Sigma
Post
Low-Pass
Filter
Post
Low-Pass
Filter
(1)
(1)
(1)
Serial
Control
or
Format
Control
Digital
Audio
Data
Reset
Line In Left-Channel
+5V
Line In Right-Channel
Line Out Right-Channel
Line Out Left-Channel
NOTES: (1) Bypass capacitor = 0.1μF to 10μF. (2) The input capacitor
affects the pole of the HPF. Example: 2.2μF sets the cut-off frequency
to 4.8Hz, with a 66ms time constant.
APPLICATION AND LAYOUT
CONSIDERATIONS
POWER SUPPLY BYPASSING
The digital and analog power supply lines to PCM3000/
3001 should be bypassed to the corresponding ground pins
with both 0.1
μ
F ceramic and 10
μ
F tantalum capacitors as
close to the device pins as possible. Although PCM3000/
3001 has three power supply lines to optimize dynamic
performance, the use of one common power supply is
generally recommended to avoid unexpected latch-up or pop
noise due to power supply sequencing problems. If separate
power supplies are used, back-to-back diodes are recom-
mended to avoid latch-up problems.
GROUNDING
In order to optimize dynamic performance of PCM3000/
3001, the analog and digital grounds are not internally
connected. PCM3000/3001 performance is optimized with a
single ground plane for all returns. It is recommended to tie
all PCM3000/3001 ground pins with low impedance con-
nections to the analog ground plane. PCM3000/3001 should
reside entirely over this plane to avoid coupling high fre-
quency digital switching noise into the analog ground plane.
VOLTAGE INPUT PINS
A tantalum or aluminum electrolytic capacitor, between 2.2
μ
F
and 10
μ
F, is recommended as an AC-coupling capacitor at
the inputs. Combined with the 15k
characteristic input
impedance, a 2.2
μ
F coupling capacitor will establish a 4.8Hz
cutoff frequency for blocking DC. The input voltage range
can be increased by adding a series resistor on the analog
input line. This series resistor, when combined with the 15k
input impedance, creates a voltage divider and enables larger
input ranges.
V
REF
INPUTS
A 4.7
μ
F to 10
μ
F tantalum capacitor is recommended be-
tween V
REF
L, V
REF
R, and AGND to ensure low source
impedance for the ADC’s references. These capacitors should
be located as close as possible to the reference pins to reduce
dynamic errors on the ADC reference.
C
IN
P AND C
IN
N INPUTS
A 470pF to 1000pF film or NPO ceramic capacitor is recom-
mended between C
IN
PL and C
IN
NL, C
IN
PR, and C
IN
NR to
create an anti-alias filter, which will have an 170kHz to
80kHz cut-off frequency. These capacitors should be located
as close as possible to the C
IN
P and C
IN
N pins to avoid
introducing undesirable noise or dynamic errors into the
delta-sigma modulator.
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