
3
PCM1760P/U DF1760P/U
MODEL
PCM1760P
PCM1760U
PCM1760P-L
PCM1760U-L
DF1760P
DF1760U
PACKAGE
PDIP
SOIC
PDIP
SOIC
PDIP
SOIC
THD +N (fs)
–90dB
–90dB
–88dB
–88dB
NA
NA
SNR
108dB
108dB
106dB
106dB
NA
NA
Supply Voltage .................................................................................... 7.0V
Voltage Mismatch ...............................................................................0.1V
Digital Input ...............................................................................+V
DD
+0.5V
V
SS
–0.5V
±
20mA
Input Current
Power Dissipation/P ....................................................................... 460mW
Power Dissipation/U....................................................................... 440mW
Lead Temperature/P (soldering, 10s) .............................................. 260
°
C
Lead Temperature/U (soldering, 10s, reflow)................................... 235
°
C
Operating Temperature.......................................................... 0
°
C to +70
°
c
Storage Temperature ...................................................... –50
°
C to +125
°
C
Supply Voltage .....................................................................................
±
6V
Voltage Mismatch ...............................................................................0.1V
Analog Input........................................................................................
±
V
CC
Digital Input ...............................................................................+V
DD
+0.3V
GND –0.3V
Power Dissipation/P ....................................................................... 580mW
Power Dissipation/U....................................................................... 550mW
Lead Temperature/P (soldering, 10s) .............................................. 260
°
C
Lead Temperature/U (soldering, 10s) .............................................. 235
°
C
Operating Temperature......................................................... 0
°
C to +70
°
C
Storage Temperature ...................................................... –50
°
C to +125
°
C
ABSOLUTE MAXIMUM RATINGS—PCM1760
ABSOLUTE MAXIMUM RATINGS—DF1760
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
ORDERING INFORMATION
PACKAGE INFORMATION
PACKAGE DRAWING
NUMBER
(1)
MODEL
PACKAGE
PCM1760P
PCM1760U
PCM1760P-L
PCM1760U-L
28-Pin PDIP
28-Pin SOIC
28-Pin PDIP
28-Pin SOIC
800
804
800
804
DF1760P
DF1760U
28-Pin PDIP
28-Pin SOIC
801
805
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
PIN ASSIGNMENTS PCM1760
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
I/O
(1)
O
I
O
I
–
–
–
–
–
–
I
O
I
O
–
–
O
O
I
–
–
–
O
O
O
O
–
–
NAME
Out-2R
In-2R
Out-1R
In-1R
SERVO DC
+V
AGND
–V
BGDC
NC
In-1L
Out-1L
In-2L
Out-2L
NC
BPODC-L
L/RCK
Strobe
256fs
–V
DGND
+V
DD
D
0
D
1
D
2
D
BPODC-R
NC
DESCRIPTION
Right Channel Second Integrator Output
Right Channel Second Integrator Input
Right Channel First Integrator Output
Right Channel First Integrator Input
Servo Amp Decoupling Capacitor
+5V Analog Supply Voltage
Analog Common
–5V Analog Supply Voltage
Band Gap Reference Decoupling Capacitor
No Connection
Left Channel First Integrator Input
Left Channel First Integrator Output
Left Channel Second Integrator Input
Left Channel Second Integrator Output
No Connection
Left Channel Bipolar Offset Decoupling Capacitor
LR Clock Output (64fs)
Data Strobe Output (128fs)
256fs Clock Input
–5V Digital Supply Voltage
Digital Common
+5V Digital Supply Voltage
D
0
Data Output (LSB)
D
1
Data Output
D
2
Data Output
D
Data Output (MSB)
Right Channel Bipolar Offset Decoupling Capacitor
No Connection
Top View
SOIC/DIP
PCM1760
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Out-2R
In-2R
Out-1R
In-1R
SERVO DC
+V
CC
AGND
–V
CC
BGDC
NC
In-1L
Out-1L
In-2L
Out-2L
NC
BPODC-R
D
3
D
2
D
1
D
0
+V
DD
DGND
–V
DD
256fs
Strobe
L/RCK
BPODC-L
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NOTE: (1) O = Output terminal; I = Input terminal.