參數(shù)資料
型號： PCF8833
廠商： NXP Semiconductors N.V.
英文描述： STN RGB - 132 X 132 X 3 driver
中文描述： 超扭曲的RGB - 132 × 132 × 3驅(qū)動程序
文件頁數(shù)： 87/112頁
文件大小： 469K
代理商： PCF8833
2003 Feb 14
87
Philips Semiconductors
Objective specification
STN RGB - 132
×
132
×
3 driver
PCF8833
15.5
Interface commands
Table 94 contains a list of all OTP related commands.
Table 94
OTP related commands
Note
1.
X = don’t care. For hexadecimal representation, don’t care bits are assumed to be 0.
NAME
D/C
COMMAND BYTE
(1)
HEX
DESCRIPTION
D7
D6
D5
D4
D3
D2
D1
D0
CALMM
0
1
1
X
1
X
1
1
0
0
X
0
0
F0
CALMM command
entry CALMM mode
(CALMM) enable
programming (OPE) set
address (ORA)
generate a refresh of the
OTP if CALMM = 0
start shifting data in the shift
register; the shifting is
executed as long as D/C = 1
EE/EF set factory default (see
Sections 6.2.47 and 15.2)
ORA
2
ORA
1
ORA
0
OPE
CALMM
Sleep_OUT
0
0
0
0
1
0
0
0
1
11
OTPSHTIN
0
1
1
X
1
1
1
0
0
0
1
F1
D
6
D
5
D
4
D
3
D
2
D
1
D
0
SFD
0
1
1
1
0
1
1
1
SFD
15.5.1
C
ALIBRATION MODULE MAKER MODE
When CALMM = 1 the device enters the calibration
module maker mode. This mode enables the filling of the
OTP matrix and allows programming of the non-volatile
OTP cells to take place.
The V
OTP(drain)
pad is not connected directly to the OTP
cells, but through a switch that must be closed for
programming by setting OPE to logic 1.
The OTP row to be programmed may be chosen by setting
the OTP row address ORA[2:0].
15.5.2
R
EFRESH
The action of the refresh instruction is to force the registers
of the OTP matrix to load the value from the non-volatile
part of the OTP cell. This instruction takes up to 1 ms to
complete. During this time all other instructions may be
sent.
In the PCF8833 the refresh instruction is associated with
the Sleep_OUT instruction such that the shift register is
automatically refreshed every time the Sleep_OUT
instruction is sent.
No refresh may be started when in CALMM mode, i.e.
whenever CALMM = 1.
15.5.3
S
HIFT IN
The OTP matrix (see Table 90) is filled using the
OTPSHTIN command, which is similar to the RAM write
command. First the appropriate command is sent, then the
following data bytes are shifted bytewise into the OTP
matrix from left to right, i.e. the new byte is loaded into
byte 0,whereasthedataofbyte 0isshiftedintobyte 1and
so on. Bit 7 of the data is not used. The shifting is enabled
as long as D/C remains at logic 1.
15.6
Suggestion on how to calibrate V
LCD2
using
MMVOP
In order to calibrate the programming of V
LCD2
, the
sequence in Table 95 is suggested to determine what
MMVOP value has to be programmed.
It is assumed that the relevant parameters, the V
LCD2
programming, V
PR
and the number of stages S, are set via
the interface. This implies that SFD is set to logic 0 and
that all OTP settings except MMVOP are ignored.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCF88331 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 132 X 132 X 3 driver
PCF88332DA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 132 X 132 X 3 driver
PCF8833U 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 132 X 132 X 3 driver
PCF8833U/2DA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 132 X 132 X 3 driver
PCF8881 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:132 x 132 RGB single chip TFT driver with DC-to-DC converter
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