參數(shù)資料
型號(hào)： PCF8820
廠商： NXP Semiconductors N.V.
英文描述： 67 x 101 Grey-scale/ECB colour dot matrix LCD driver
中文描述： 67 × 101 Grey-scale/ECB彩色點(diǎn)陣LCD驅(qū)動(dòng)器
文件頁(yè)數(shù)： 24/60頁(yè)
文件大?。?/td> 316K
代理商： PCF8820
2000 Dec 07
24
Philips Semiconductors
Product specification
67
×
101 Grey-scale/ECB colour dot matrix
LCD driver
PCF8820
8.1.1
P
OWER
-
DOWN MODE
During power-down (bit PD = 1) all static currents are
switched off (no internal oscillator, no timing, no LCD
segment drive system) and all LCD outputs are internally
connected to V
SS
.
To decrease the voltage at V
LCDOUT
very fast the following
features can be used:
Select the direct drive mode by setting bit DM = 1
resulting in V
LCDOUT
= V
DD2
Select the non direct drive mode by setting bit DM = 0,
resulting in V
LCDOUT
= 0 V (output high-impedance).
During power-down:
All LCD outputs at V
SS
(display off)
Oscillator is off
Intermediate bias voltage generator is off
High voltage generator is disabled; however, the status
of bit HVE is unchanged (see Table 8)
An external V
LCD
can be disconnected from V
LCDIN
The I
2
C-bus is operational; commands can be executed
DDRAM contents is not cleared; DDRAM data can be
written
Register settings remain unchanged
Temperature measurement is not possible.
8.1.2
P
ARTIAL SCREEN MODE
Partial screen mode allows data to be displayed of
DDRAM bank 0 to 1 on the first 8 rows or bank 14 to 15 on
the last 8 rows, depending on the status of
bits DP
2
to DP
0
.
If bit MY = 0, data is displayed either on rows 0 to 7 (first
8 rows) or on rows 56 to 63 (last 8 rows).
Ifbit MY = 1,dataisdisplayedeitheronrows66 to 59(first
8 rows) or on rows 10 to 3 (last 8 rows).
The partial screen mode also allows V
LCDIN
to be reduced
to save power.
Frame frequency calibration is not allowed in the partial
screen mode.
8.1.3
Y-
ADDRESS OF
DDRAM
Bits Y
4
to Y
0
define the Y-address of the DDRAM.
Table 4
Y-address
8.1.4
B
IAS SYSTEM
Different LCD bias voltage settings are required at
different multiplex rates. The status of bits BS
2
to BS
0
and
bit BS
1
/
2
select different ‘bias systems’ which determine
the intermediate bias voltage levels between
V
LCDIN
and V
SS1
. It should be noted that the bias system
selected by bit BS
1
/
2
is independent of the bias systems
selected by bits BS
2
to BS
0
.
A value ‘n’ attributed to each bias system is used to
calculate these levels (see Table 5).
The optimum value for ‘n’ is given by:
M is the multiplex rate.
where
Table 6 shows how bias voltage levels are calculated for
three of the available bias systems using supported ‘n’
values.
Y
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Y
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
Y
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
Y
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
Y
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
RAM BANK
bank 0
bank 1
bank 2
bank 3
bank 4
bank 5
bank 6
bank 7
bank 8
bank 9
bank 10
bank 11
bank 12
bank 13
bank 14
bank 15
bank 16
n
M
3
–
=
相關(guān)PDF資料
PDF描述
PCF8820U 67 x 101 Grey-scale/ECB colour dot matrix LCD driver
PCF8831 STN RGB - 160 output row driver
PCF8831U STN RGB - 160 output row driver
PCF8833 STN RGB - 132 X 132 X 3 driver
PCF88331 STN RGB - 132 X 132 X 3 driver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCF8820U 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:67 x 101 Grey-scale/ECB colour dot matrix LCD driver
PCF8831 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 160 output row driver
PCF8831U 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 160 output row driver
PCF8832 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STN RGB - 384 output column driver
PCF8833 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 132 X 132 X 3 driver
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