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參數(shù)資料
| 型號(hào)： | PCF8820 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 67 x 101 Grey-scale/ECB colour dot matrix LCD driver |
| 中文描述： | 67 × 101 Grey-scale/ECB彩色點(diǎn)陣LCD驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 16/60頁 |
| 文件大小： | 316K |
| 代理商： | PCF8820 |
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2000 Dec 07
16
Philips Semiconductors
Product specification
67
×
101 Grey-scale/ECB colour dot matrix
LCD driver
PCF8820
7.18.3
S
YSTEM CONFIGURATION
Thd system components are defined below (see Fig.13):
Transmitter: the device which sends data to the bus
Receiver: the device which receives data from the bus
Master: the device which initiates a transfer, generates
clock signals and terminates a transfer
Slave: the device addressed by a master
Multi-master: more than one master can attempt to
control the bus at the same time without corrupting the
message
Arbitration: procedure to ensure that, if more than one
master simultaneously tries to control the bus, only one
is allowed to do so and the message is not corrupted
Synchronization: procedure to synchronize the clock
signals of two or more devices.
7.18.4
A
CKNOWLEDGE
Each 8-bit data byte transferred over the bus must be
followed by an acknowledge bit (see Fig.14).
During the acknowledge clock pulse a HIGH-level signal is
put on the bus by the transmitter.
A slave receiver which is addressed must generate an
acknowledge bit after the reception of each data byte.
A master receiver must generate an acknowledge bit after
receiving a data byte that has been clocked out of the
slave transmitter. The device that acknowledges must
pull-down the SDA line to a LOW-level during the
acknowledge clock pulse. Set-up and hold times must be
taken into consideration to ensure that the SDA line is
stable during the HIGH period of the acknowledge related
clock pulse.
A master receiver must signal an end-of-data to the slave
transmitter by not generating an acknowledge bit on the
last byte that has been clocked out of the slave transmitter.
In this event the slave transmitter must leave the data line
HIGH to allow the master to generate a STOP condition.
For the PCF8820 the acknowledge bit is output at
pad SDA_OUT.
MGA807
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
SLAVE
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER/
RECEIVER
Fig.13 System configuration.
handbook, full pagewidth
MBC602
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
Fig.14 Acknowledgement on the I
2
C-bus.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCF8820U | 67 x 101 Grey-scale/ECB colour dot matrix LCD driver |
| PCF8831 | STN RGB - 160 output row driver |
| PCF8831U | STN RGB - 160 output row driver |
| PCF8833 | STN RGB - 132 X 132 X 3 driver |
| PCF88331 | STN RGB - 132 X 132 X 3 driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCF8820U | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:67 x 101 Grey-scale/ECB colour dot matrix LCD driver |
| PCF8831 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 160 output row driver |
| PCF8831U | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 160 output row driver |
| PCF8832 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STN RGB - 384 output column driver |
| PCF8833 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:STN RGB - 132 X 132 X 3 driver |
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