參數(shù)資料
型號: PCF8576CH
廠商: NXP SEMICONDUCTORS
元件分類: 顯示驅(qū)動器
英文描述: Universal LCD driver for low multiplex rates
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT314-2, LQFP-64
文件頁數(shù): 29/40頁
文件大?。?/td> 243K
代理商: PCF8576CH
1998 Feb 06
29
Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
PCF8576
11 AC CHARACTERISTICS
V
DD
= 2 to 9 V; V
SS
= 0 V; V
LCD
= V
DD
2 V to V
DD
9 V; T
amb
=
40 to +85
°
C; unless otherwise specified.
Notes
1.
2.
At f
clk
< 125 kHz, I
2
C-bus maximum transmission speed is derated.
All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to
V
IL
and V
IH
with an input voltage swing of V
SS
to V
DD
.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
f
clk
oscillator frequency on pin CLK
normal mode
power-saving mode
CLK HIGH time
CLK LOW time
SYNC propagation delay time
SYNC LOW time
driver delays with test loads
V
DD
= 5 V; note 1
V
DD
= 3.5 V
see Fig.21
125
21
1
1
1
200
31
288
48
400
30
kHz
kHz
μ
s
μ
s
ns
μ
s
μ
s
t
clkH
t
clkL
t
PSYNC
t
SYNCL
t
PLCD
V
LCD
= V
DD
5 V; see Fig.20
Timing characteristics: I
2
C-bus;
note 2; see Fig.22
t
SW
t
BUF
t
HD;STA
t
SU;STA
t
LOW
t
HIGH
t
r
t
f
C
B
t
SU;DAT
t
HD;DAT
t
SU;STO
tolerable spike width on bus
bus free time
START condition hold time
set-up time for a repeated START condition
SCL LOW time
SCL HIGH time
SCL and SDA rise time
SCL and SDA fall time
capacitive bus line load
data set-up time
data hold time
set-up time for STOP condition
4.7
4.0
4.7
4.7
4.0
250
0
4.0
100
1
0.3
400
ns
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
pF
ns
ns
μ
s
Fig.20 Test loads.
MBE544
3.3 k
1.5 k
0.5VDD
VDD
VDD
SDA,
SCL
CLK
1 nF
BP0 to BP3, and
S0 to S39
(2%)
(2%)
6.8
VDD
SYNC
(2%)
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