參數(shù)資料
型號(hào)： PCF8576CH
廠商： NXP SEMICONDUCTORS
元件分類： 顯示驅(qū)動(dòng)器
英文描述： Universal LCD driver for low multiplex rates
中文描述： LIQUID CRYSTAL DISPLAY DRIVER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT314-2, LQFP-64
文件頁(yè)數(shù)： 23/40頁(yè)
文件大?。?/td> 243K
代理商： PCF8576CH
1998 Feb 06
23
Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
PCF8576
Table 5
Definition of PCF8576 commands
COMMAND
OPCODE
OPTIONS
DESCRIPTION
MODE SET
C 1
0
LP
E
B
M1
M0
Table 6
Table 7
Table 8
Defines LCD drive mode.
Defines LCD bias configuration.
Defines display status. The possibility to disable the
display allows implementation of blinking under
external control.
Defines power dissipation mode.
Six bits of immediate data, bits P5 to P0, are
transferred to the data pointer to define one of forty
display RAM addresses.
Three bits of immediate data, bits A2 to A0, are
transferred to the subaddress counter to define one of
eight hardware subaddresses.
Defines input bank selection (storage of arriving
display data).
Defines output bank selection (retrieval of LCD display
data). The BANK SELECT command has no effect in
1 : 3 and 1 : 4 multiplex drive modes.
Defines the blinking frequency.
Selects the blinking mode; normal operation with
frequency set by BF1, BF0 or blinking by alternation of
display RAM banks. Alternation blinking does not
apply in 1 : 3 and 1 : 4 multiplex drive modes.
Table 9
Table 10
LOAD DATA
POINTER
C 0 P5 P4 P3 P2
P1
P0
DEVICE
SELECT
C 1
1
0
0
A2
A1
A0
Table 11
BANK
SELECT
C 1
1
1
1
0
I
O
Table 12
Table 13
BLINK
C 1
1
1
0
A
BF1 BF0
Table 14
Table 15
Table 6
MODE SET option 1
Table 7
MODE SET option 2
Table 8
MODE SET option 3
LCD DRIVE MODE
BITS
DRIVE MODE
BACKPLANE
M1
M0
Static
1 : 2
1 : 3
1 : 4
1 BP
MUX (2 BP)
MUX (3 BP)
MUX (4 BP)
0
1
1
0
1
0
1
0
LCD BIAS
BIT B
1
3
bias
1
2
bias
0
1
DISPLAY STATUS
BIT E
Disabled (blank)
Enabled
0
1
Table 9
MODE SET option 4
Table 10
LOAD DATA POINTER option 1
Table 11
DEVICE SELECT option 1
Table 12
BANK SELECT option 1
MODE
BIT LP
Normal mode
Power-saving mode
0
1
DESCRIPTION
BITS
6-bit binary value of 0 to 39 P5
P4
P3
P2
P1
P0
DESCRIPTION
BITS
3-bit binary value of 0 to 7
A2
A1
A0
STATIC
1 : 2 MUX
BIT I
RAM bit 0
RAM bit 2
RAM bits 0 and 1
RAM bits 2 and 3
0
1
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