參數(shù)資料
型號: PCF8535U
廠商: NXP SEMICONDUCTORS
元件分類: 顯示驅(qū)動器
英文描述: 65 x 133 pixel matrix driver
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, UUC
封裝: DIE
文件頁數(shù): 15/52頁
文件大?。?/td> 1765K
代理商: PCF8535U
1999 Aug 24
15
Philips Semiconductors
Objective specification
65
×
133 pixel matrix driver
PCF8535
7.15
Addressing
Addressing of the RAM can be split into two parts; input
addressing and output addressing. Input addressing is
concerned with writing data into the RAM. Output
addressing is almost entirely automatic and taken care of
by the device, however, it is possible to affect the output
mode.
7.15.1
I
NPUT ADDRESSING
Data is down loaded byte wise into the RAM matrix of the
PCF8535 as indicated in Figs 6 to 10.
The display RAM has a matrix of 65
×
133 bits.
The columns are addressed by a combination of the
X address pointer and the X-RAM page pointer, whilst the
rows addressed in groups of 8 by the Y address pointer.
The X address pointer has a range of 0 to 127 (7FH).
Its range can be extended by the X-RAM page pointer,
XM
0
. The Y address pointer has a range of 0 to 8 (08H).
The PCF8535 is limited to 133 columns by 65 rows,
addressing the RAM outside of this area is not allowed.
Table 8
Effect of X-RAM page pointer
X ADDRESS POINTER
X-RAM PAGE POINTER
XM
0
0
0
0
:
0
0
0
1
1
:
1
ADDRESSED COLUMN
MX = 0
ADDRESSED COLUMN
MX = 1
0
1
2
:
C0
C1
C2
:
C125
C126
C127
C128
C129
:
C132
C132
C131
C130
:
C7
C6
C5
C4
C3
:
C0
125
126
127
0
1
:
4
handbook, full pagewidth
MGS673
LSB
Banks 1 to 7 use
the entire byte
Bank 8 is only
1 bit deep and
uses the MSB
MSB
0
XM0 = 1
XM0 = 0
1
2
3
4
5
6
7
8
.. ..
.. ..
LSB
0
1
2
3
4
0
1
2
3
4
1
1
1
1
1
1
1
1
1
Y
X address
icon data
5
6
7
8
9
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
Fig.6 RAM format, input addressing.
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