1998 May 11
22
Philips Semiconductors
Product specification
LCD controllers/drivers
PCF2103 family
Fig.13 Example of busy flag checking timing sequence.
MGA806
instruction
write
busy flag
check
busy flag
check
busy flag
check
instruction
write
internal operation
RS
E
internal
DB7
R/W
data
busy
busy
not
busy
data
8.1
Clear display
‘Clear display’ writes character code 20H into all DDRAM
addresses (the character pattern for character code 20H
must be a blank pattern), sets the DDRAM address
counter to logic 0 and returns display to its original position
if it was shifted. Thus, the display disappears and the
cursor or blink position goes to the left edge of the display.
Sets entry mode I/D = 1 (increment mode). S of entry
mode does not change.
The instruction ‘clear display’ requires extra execution
time. This may be allowed by checking the Busy Flag (BF)
or by waiting until the 165 clock cycles have elapsed.
The latter must be applied where no read-back options are
foreseen, as in some Chip-On-Glass (COG) applications.
8.2
Return home
‘Return home’ sets the DDRAM address counter to logic 0
and returns display to its original position if it was shifted.
DDRAM contents do not change. The cursor or blink
position goes to the left of the first display line. I/D and S of
entry mode do not change.
8.3
Entry mode set
8.3.1
I/D
When I/D = 1 (0) the DDRAM or CGRAM address
increments (decrements) by 1 when data is written into or
read from the DDRAM or CGRAM. The cursor or blink
position moves to the right when incremented and to the
left when decremented. The cursor underline and cursor
character blink are inhibited when the CGRAM is
accessed.
8.3.2
S
When S = 1, the entire display shifts either to the right
(I/D = 0) or to the left (I/D = 1) during a DDRAM write. Thus
it looks as if the cursor stands still and the display moves.
The display does not shift when reading from the DDRAM,
or when writing into or reading out of the CGRAM. When
S = 0 the display does not shift.