參數(shù)資料
型號(hào): PCD6003H
廠商: NXP SEMICONDUCTORS
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Digital telephone answering machine chip
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP80
封裝: PLASTIC, QFP-80
文件頁數(shù): 9/96頁
文件大?。?/td> 385K
代理商: PCD6003H
2001 Apr 17
9
Philips Semiconductors
Product specification
Digital telephone answering machine chip
PCD6003
Note
1.
The pin type codes are explained in Section 6.3.
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
75
76
77
78
79
80
O
O
O
O
O
O
L
L
L
L
L
L
ucp4mthuwh
ucp4mthuwh
ucp4mthuwh
ucp4mthuwh
ucp4mthuwh
ucp4mthuwh
general purpose output, EA = 1; add_high; EA = 0
general purpose output, EA = 1; add_high; EA = 0
general purpose output, EA = 1; add_high; EA = 0
general purpose output, EA = 1; add_high; EA = 0
general purpose output, EA = 1; add_high; EA = 0
general purpose output, EA = 1; add_high; EA = 0
SYMBOL
PIN
I/O
RESET
STATE
PIN TYPE
(1)
DESCRIPTION
6.3
Pin types
6.3.1
P
OWER SUPPLY PINS
There are 6 different power supply domains (see Fig.3):
Digital core circuit (2.5 V): V
DD3V1
/V
SS3V1
Digital periphery circuit (3.0 V): V
DD3V2
/V
SS3V2
and
V
DD3V3
/V
SS3V3
PLL circuits and crystal oscillator (2.5 V): V
DDPLL
and
V
SSPLL
Analog circuits (2.5 V): V
DDA
and V
SSA
.
All V
SS
pins must be connected to the same ground plane
on the Printed-Circuit Board (PCB). All 2.5 V V
DD
pins
must be connected to the same power supply. All V
DD
pins
have to be separately decoupled, according to Chapter 18.
6.3.2
A
NALOG PINS
ana: full ESD protected analog I/O pad (double
protection diode).
6.3.3
D
IGITAL PINS
ucp4mthuwh: 4 mA 80C51 I/O pins
uceda4mtuwh: 4 mA 80C51 I/O pins with input enable
iptd: input pad buffer; pull-down
ipth: input pad buffer with Schmitt trigger
ops10c: output pad; push-pull; 4 mA output drive; 10 ns
slew control
I
2
C400k: bidirectional open-drain I
2
C-bus compatible
pad.
handbook, halfpage
MGT429
VSS3V1
VDD3V2
VSS3V2
VDD3V3
VSS3V3
VDDPLL
VSSPLL
VDDA
VSSA
Fig.3 PCD6003 chip supply rails with protection diodes.
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