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參數(shù)資料
| 型號(hào)： | PCD6003H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Digital telephone answering machine chip |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 82/96頁 |
| 文件大?。?/td> | 385K |
| 代理商： | PCD6003H |
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2001 Apr 17
82
Philips Semiconductors
Product specification
Digital telephone answering machine chip
PCD6003
13. Absolute typical gain for CODEC1 and CODEC2 for gain step 35 dB (CDVC2.3 = 1, DTCON.5 = 1 and
DTCON.1 = 0), measured at the DR1/DR2 bitstream interface as defined in Fig.29 using a 1020 Hz sinewave. V
REF
is tuned to 2.00 V.
14. Absolute typical additional gain for CODEC2 when enabling the 15 dB microphone preamplifier (DTCON.1 = 0 and
DTCON.2 = 1), measured using a 1020 Hz sinewave. V
REF
is tuned to 2.00 V.
15. The deviation of the actual gain for CODEC1 and CODEC2 from the specified absolute typical gain for gain steps
7 dB and +23 dB (CDVC2.3 = 0 and DTCON.5 = 0), measured at the DR1/DR2 bitstream interface as defined in
Fig.29 using a 1020 Hz sinewave. Including eventual gain variation for CODEC2 when enabling the microphone
preamplifier.
16. The deviation of the actual gain for CODEC1 and CODEC2 from the specified absolute typical gain for gain step
35 dB (CDVC2.3 = 1, DTCON.5 = 1 and DTCON.1 = 0), measured at the DR1/DR2 bitstream interface as defined in
Fig.29 using a 1020 Hz sinewave. V
REF
is tuned to 2.00 V. Including eventual gain variation for CODEC2 when
enabling the microphone preamplifier.
17. The analog-to-digital path gain is set to 7 dB for CODEC1 and to 23 dB for CODEC2 (CDVC1.3 = 0, CDVC2.3 = 0,
DTCON.5 = 0, DTCON.1 = 0 and DTCON.2 = 0). LIFPIN and LIFMIN1 or LIFMIN2 are shorted together for
CODEC1, MICP and MICM are shorted together for CODEC2. The measured value is psophometrically weighted.
18. The analog-to-digital path gain is set to 23 dB for CODEC2 (CDVC2.3 = 0, DTCON.1 = 0 and DTCON.2 = 0), when
a sinewave of 1020 Hz with a level of
25 dBm is applied between MICP and MICM. The value includes harmonic
distortion and is psophometrically weighted.
19. The analog-to-digital path gain is set to 23 dB for CODEC2 (CDVC2.3 = 0, DTCON.1 = 0 and DTCON.2 = 0), when
a sinewave of 1020 Hz with a level of
49 dBm is applied between MICP and MICM. The value includes harmonic
distortion and is psophometrically weighted.
20. The analog-to-digital path gain is set to 23 dB for CODEC2 (CDVC2.3 = 0, DTCON.1 = 0 and DTCON.2 = 0), when
a sinewave of 1020 Hz with a level of
65 dBm is applied between MICP and MICM. The value includes harmonic
distortion and is psophometrically weighted.
21. The analog-to-digital path gain is set to 7 dB for CODEC1 (CDVC1.3 = 0 and DTCON.5 = 0), when a sinewave of
1020 Hz with a level of
9 dBm is applied between LIFPIN and LIFMIN1 or LIFMIN2. The value includes harmonic
distortion and is psophometrically weighted.
22. The analog-to-digital path gain is set to 7 dB for CODEC1 (CDVC1.3 = 0 and DTCON.5 = 0), when a sinewave of
1020 Hz with a level of
25 dBm is applied between LIFPIN and LIFMIN1 or LIFMIN2. The value includes harmonic
distortion and is psophometrically weighted.
23. The analog-to-digital path gain is set to 7 dB for CODEC1 (CDVC1.3 = 0 and DTCON.5 = 0), when a sinewave of
1020 Hz with a level of
49 dBm is applied between LIFPIN and LIFMIN1 or LIFMIN2. The value includes harmonic
distortion and is psophometrically weighted.
24. Sinewave RMS level measured differentially between pins LIFPOUT and LIFMOUT. The digital-to-analog path gain
is set to 6 dB (CDVC1.7 = 1 and CDVC1.6 = 1). The input signal is 1020 Hz with the maximum level of 3.14 dBm0
at the PCM interface (see Section 13.1 for definitions). Load resistance is greater than 400
. Lower load resistances
will cause harmonic distortion greater than 1% at the Line output.
25. All output resistances represent the theoretical maximum which can be guaranteed by design at maximum signal
strength (as defined in note 24). Actual output resistance values can vary depending on several conditions as
processing, temperature and drive signal shape. For smaller signals the output resistance will strongly decrease.
26. Sinewave RMS level measured differentially between pins SPKRP and SPKRM. The digital-to-analog path gain is
set to 6 dB (CDVC2.7 = 1 and CDVC2.6 = 1). The input signal is 1020 Hz with the maximum level of 3.14 dBm0 at
the PCM interface (see Section 13.1 for definitions). Load resistance is greater than 100
. Lower load resistances
will cause harmonic distortion greater than 1% at the speaker output.
27. The deviation of the actual digital-to-analog gain from the nominal digital-to-analog gain as specified in
CDVC1/CDVC2, measured at the DT1/DT2 bitstream interface as defined in using a 1020 Hz sinewave. V
REF
is
tuned to 2.00 V.
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