參數(shù)資料
型號(hào): PCD5008
廠商: NXP Semiconductors N.V.
英文描述: FLEX Pager Decoder
中文描述: FleX創(chuàng)建傳呼機(jī)解碼器
文件頁(yè)數(shù): 49/64頁(yè)
文件大?。?/td> 341K
代理商: PCD5008
1998 Jun 17
49
Philips Semiconductors
Product specification
FLEX
Pager Decoder
PCD5008
8.8.3
A
LL FRAME MODE
(ID = 03H)
The FLEX
protocol requires pagers to be capable of
receiving data in frames other than pagers’ programmed
frames and frames implied by collapse values. This is
achieved in the PCD5008 by all frame mode (AFM) which
is required to implement the following features:
Fragmented messages Section 8.8.5)
Temporary addresses (Section 8.8.4).
The PCD5008 enters AFM automatically and when
in AFM, it decodes every FLEX
frame irrespective of
whether it is a programmed frame. In AFM the PCD5008
sends a status packet with the end-of-frame (EOF) bit set
at the end of every frame. In addition the host can force
AFM by sending an AFM packet with the force all frame
mode (FAF) bit set.
The PCD5008 contains a number of counters which are
used to track the number of active calls requiring AFM.
These consist of an AFM counter for tracking the number
of active fragmented messages and 16 temporary address
enable (TAE) counters which count the number of times
each temporary address has been enabled. These
counters are automatically incremented when a
corresponding vector is received, i.e.:
A short instruction vector indicating a temporary address
has been assigned to this pager
A vector indicating a message for this pager with a
format which allows fragmentation.
The host must determine when no further data can be
received for a message associated with a temporary
address, or a fragmented message, and send an
AFM packet, see Table 56, to decrement the appropriate
counter. AFM remains active until the host determines that
no further data can be sent to it outside programmed
frames, i.e:
The TAE counters are all zero indicating that no further
temporary message data is expected
The AFM counter is zero indicating that no further data
is expected for fragmented messages
The FAF bit is clear.
Both the AFM counter and the TAE counters can only be
incremented internally by the PCD5008 and can only be
decremented by the host via AFM packet. Neither the
TAE counters nor the AFM counter can be incremented
past the value 127 (it does not roll-over) or decremented
past the value 0. The TAE counters and the AFM counter
are cleared on a reset and when the decoder is turned off.
DAF:
decrement all frame mode counter, see Table 56.
Setting this bit decrements the AFM counter by one. If a
packet is sent with this bit clear, the AFM counter is not
affected. Value after reset = 0.
FAF:
force all frame mode, see Table 56. Setting this bit
forces the PCD5008 to enter AFM. If this bit is clear, the
PCD5008 may or may not be in AFM depending on the
status of the AFM counter and the TAE counters. This
functionality may be useful in acquiring transmitted time
information. Value after reset = 0.
DTA:
decrement temporary address enable counter, see
Table 56. When a bit in this word is set, the corresponding
TAE counter is decremented by one. When a bit is clear,
the corresponding TAE counter is not affected. When a
TAE counter reaches zero, the temporary address is
disabled. Value after reset = 0.
Table 56
All frame mode packet bit assignments
BYTE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
3
2
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
DAF
DTA
15
DTA
7
FAF
DTA
14
DTA
6
DTA
13
DTA
5
DTA
12
DTA
4
DTA
11
DTA
3
DTA
10
DTA
2
DTA
9
DTA
1
DTA
8
DTA
0
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