參數(shù)資料
型號: PCA9501
廠商: NXP Semiconductors N.V.
英文描述: 8-bit I2C and SMBus I/O port with interrupt, 2-kbit EEPROM and 6 address pins
中文描述: 8位I2C和SMBus I / O口的中斷,2千比特的EEPROM和6個地址引腳
文件頁數(shù): 9/22頁
文件大?。?/td> 146K
代理商: PCA9501
Philips Semiconductors
8-bit I
2
C and SMBus I/O port with interrupt,
2-kbit EEPROM and 6 address pins
Product data
PCA9501
2003 Sep 12
9
MEMORY OPERATIONS
Write operations
Write operations require an additional address field to indicate the
memory address location to be written. The address field is eight
bits long providing access to any one of the 256 words of memory.
There are two types of write operations, byte write and page write.
Write operation is possible when WC control pin put at a low logic
level (0). When this control signal is set at 1, write operation is not
possible and data in the memory is protected.
Byte Write and Page Write explained below assume that Write
Control pin (WC) is set to 0.
Byte Write (see Figure 11)
To perform a byte write the start condition is followed by the memory
slave address and the R/W bit set to 0. The PCA9501 will respond
with an acknowledge and then consider the next eight bits sent as
the word address and the eight bits after the word address as the
data. The PCA9501 will issue an acknowledge after the receipt of
both the word address and the data. To terminate the data transfer
the master issues the stop condition, initiating the internal write cycle
to the non-volatile memory. Only write and read operations to the
quasi-bidirectional I/Os are allowed during the internal write cycle.
Page Write (see Figure 12)
A page write is initiated in the same way as the byte write, if after
sending the first word of data, the stop condition is not received the
PCA9501 considers subsequent words as data. After each data
word the PCA9501 responds with an acknowledge and the four
least significant bits of the memory address field are incremented.
Should the master not send a stop condition after 16 data words the
address counter will return to its initial value and overwrite the data
previously written. After the receipt of the stop condition the inputs
will behave as with the byte write during the internal write cycle.
SW00651
S
1
A5 A4 A3 A2 A1 A0
0
A
A
SDA
ACKNOWLEDGE
FROM SLAVE
R/W
START CONDITION
ACKNOWLEDGE
FROM SLAVE
SLAVE ADDRESS (MEMORY)
WORD ADDRESS
A
P
DATA
ACKNOWLEDGE
FROM SLAVE
STOP CONDITION.
WRITE TO THE
MEMORY IS
PERFORMED
Figure 11. Byte write
SW00652
ACKNOWLEDGE
FROM SLAVE
S
1
A5 A4 A3 A2 A1 A0
0
A
A
A
SDA
ACKNOWLEDGE
FROM SLAVE
R/W
START CONDITION
ACKNOWLEDGE
FROM SLAVE
SLAVE ADDRESS (MEMORY)
WORD ADDRESS
DATA TO MEMORY
DATA n
A
P
DATA n + 3
STOP CONDITION.
WRITE TO THE MEMORY
IS PERFORMED
DATA TO MEMORY
Figure 12. Page Write
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