參數(shù)資料
型號: PC2119VU
廠商: NXP Semiconductors N.V.
英文描述: KPTC 23C 21#20 2#16 PIN PLUG
中文描述: LCD控制器/驅(qū)動器
文件頁數(shù): 6/60頁
文件大?。?/td> 260K
代理商: PC2119VU
1999 Mar 02
6
Philips Semiconductors
Product specification
LCD controllers/drivers
PCF2119x
7
FUNCTIONAL DESCRIPTION
7.1
LCD supply voltage generator
The LCD supply voltage may be generated on-chip.
The voltage generator is controlled by two internal 6-bit
registers: V
A
and V
B
. The nominal LCD operating voltage
at room temperature is given by the relationship:
7.2
Programming ranges
Programmed value: 1 to 63. Voltage: 1.902 to 6.986 V.
T
ref
= 27
°
C.
Values producing more than 6.5 V at operating
temperature are not allowed.
Operation above this
voltage may damage the device. When programming the
operating voltage the V
LCD
temperature coefficient must
be taken into account.
Values below 2.2 V are below the specified operating
range of the chip and are therefore not allowed.
Value 0 for V
A
and V
B
switches the generator off
(i.e. V
A
= 0 in character mode, V
B
= 0 in icon mode).
Usually register V
A
is programmed with the voltage for
character mode and register V
B
with the voltage for icon
mode.
V
OP(nom)
integer value of register
0.08
×
2
(
)
1.82
+
=
When V
LCD
is generated on-chip the V
LCD
pads should be
decoupled to V
SS
with a suitable capacitor. The generated
V
LCD
is independent of V
DD
and is temperature
compensated. When the generator is switched off an
external voltage may be supplied at connected pads
V
LCD1,2
. V
LCD1,2
may be higher or lower than V
DD
.
The LCD supply voltage generator ensures that, as long as
V
DD
is in the valid range (2.2 to 4 V), the required peak
voltage V
OP
= 5.2 V can be generated at any time.
7.3
LCD bias voltage generator
The intermediate bias voltages for the LCD display are
also generated on-chip. This removes the need for an
external resistive bias chain and significantly reduces the
system current consumption. The optimum value of V
LCD
depends on the multiplex rate, the LCD threshold voltage
(V
th
) and the number of bias levels. Using a 5-level bias
scheme for 1 : 18 maximum rate allows V
LCD
< 5 V for
most LCD liquids. The intermediate bias levels for the
different multiplex rates are shown in Table 2. These bias
levels are automatically set to the given values when
switching to the corresponding multiplex rate.
Table 2
Bias levels as a function of multiplex rate
Note
1.
The values in the above table are given relative to V
op
V
ss
, e.g. 3/4 means 3/4
×
(V
op
V
ss
).
7.4
Oscillator
The on-chip oscillator provides the clock signal for the display system. No external components are required and the OSC
pad must be connected to V
DD
.
MULTIPLEX
RATE
NUMBER
OF LEVELS
V
1
V
2
V
3
V
4
V
5
V
6
1 : 18
1 : 9
1 : 2
5
5
4
V
op
V
op
V
op
3/4
(1)
3/4
2/3
1/2
1/2
2/3
1/2
1/2
1/3
1/4
1/4
1/3
V
ss
V
ss
V
ss
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