參數(shù)資料
型號： PC107AVGHU100LD
廠商： ATMEL CORP
元件分類： 外設(shè)及接口
英文描述： PCI Bridge Memory Controller
中文描述： MULTIFUNCTION PERIPHERAL, CBGA503
封裝： 33 X 33 MM, HITCE, CERAMIC, BGA-503
文件頁數(shù)： 29/50頁
文件大?。?/td> 453K
代理商： PC107AVGHU100LD
29
PC107A [Preliminary]
2137C–HIREL–03/04
PCI Signal Output Hold
Timing
In order to meet minimum output hold specifications relative to PCI_SYNC_IN for both
33 MHz and 66 MHz PCI systems, the PC107A has a programmable output hold delay
for PCI signals. The initial value of the output hold delay is determined by the values on
the SDMA4 and SDMA3 reset configuration signals. Further output hold delay values
are available by programming the PCI_HOLD_DEL value of the PMCR2 configuration
register.
Table 13 describes the bit values for the PCI_HOLD_DEL values in PMCR2.
Table 13.
Power Management Configuration Register 2-0x72
Bit
Name
Reset value
Description
6 – 4
PCI_HOLD_DEL
xx0
PCI output hold delay values relative to PCI_SYNC_IN. The initial values of bits 6 and 5
are determined by the reset configuration pins
SDMA4
and
SDMA3
, respectively. As
these two pins have internal pull-up resistors, the default value after reset is 0b110.
While the minimum hold times are guaranteed at shown values, changes in the actual
hold time can be made by incrementing or decrementing the value in these bit fields of
this register via software or hardware configuration. The increment is in approximately
400 picosecond steps. Lowering the value in the three bit field decreases the amount of
output hold available.
000 66 MHz PCI. Pull-down
SDMA4
configuration pin with a 2 k
or less
value resistor. This setting guarantees the minimum output hold,
item 13a, and the maximum output valid, item 12a, times as specified in
Figure 14 are met for a 66 MHz PCI system. See Figure 17 on page 30.
001
010
011
100 33 MHz PCI. This setting guarantees the minimum output hold,
item 13a, and the maximum output valid, item 12a, times as specified in
Figure 14 are met for a 33 MHz PCI system. See Figure 17 on page 30.
101
110 (Default if reset configuration pins left unconnected)
111
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PC107AVZFU100L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
PC107AVZFU100LC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
PC107AVZFU100LD 制造商:e2v technologies 功能描述:IC BRIDGE MEM CTRL 100 MHZ - Trays
PC107B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
PC107C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
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