參數(shù)資料
型號: P89CV51RB2FA,512
廠商: NXP Semiconductors
文件頁數(shù): 35/76頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 16K 44-PLCC
產(chǎn)品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 1,300
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
其它名稱: 568-4252-5
935284111512
P89CV51RB2FA
P89CV51RB2_RC2_RD2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 25 August 2009
40 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
The following examples help to show the versatility of this scheme.
Example 1, slave 0:
Example 2, slave 1:
In the above example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a 0 in bit 0 and it ignores bit 1. Slave 1 requires
a 0 in bit 1 and bit 0 is ignored. A unique address for slave 0 would be 1100 0010 since
slave 1 requires a 0 in bit 1. A unique address for slave 1 would be 1100 0001 since a 1 in
bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit0=0 (for slave 0) and bit1=0 (for slave 1). Thus, both could be addressed
with 1100 0000.
In a more complex system the following could be used to select slaves 1 and 2 while
excluding slave 0.
Example 1, slave 0:
Example 2, slave 1:
Example 3, slave 2:
In the above example the differentiation among the 3 slaves is in the lower 3 address bits.
Slave 0 requires that bit 0 = 0 and it can be uniquely addressed by 1110 0110. Slave 1
requires that bit1=0 and it can be uniquely addressed by 1110 0101. Slave 2 requires
that bit 2 = 0 and its unique address is 1110 0011. To select slaves 0 and 1 and exclude
slave 2 use address 1110 0100, since it is necessary to make bit 2 = 1 to exclude slave 2.
The broadcast address for each slave is created by taking the logical OR of SADDR and
SADEN. Zeros in this result are treated as don’t cares. In most cases, interpreting the
don’t-cares as ones, the broadcast address will be FFH. Upon reset SADDR and SADEN
are loaded with 0s. This produces a given address of all don’t cares as well as a broadcast
SADDR = 1100 0000
SADEN = 1111 1101
Given = 1100 00X0
----------------------------------------------------
SADDR = 1100 0000
SADEN = 1111 1110
Given = 1100 000X
----------------------------------------------------
SADDR = 1100 0000
SADEN = 1111 1001
Given = 1100 0XX0
----------------------------------------------------
SADDR = 1110 0000
SADEN = 1111 1010
Given = 1110 0X0X
----------------------------------------------------
SADDR = 1100 0000
SADEN = 1111 1100
Given = 1100 00XX
----------------------------------------------------
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P89CV51RB2FBC 功能描述:8位微控制器 -MCU 80C51 16K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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P89CV51RC2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals
P89CV51RC2FA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals
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