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參數(shù)資料
| 型號： | P80C32SBAA |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 存儲器 |
| 英文描述： | 80C51 8-bit microcontroller family 128-256 byte RAM ROMless low voltage (2.7 V-5.5 V), low power, high speed (33 MHz) |
| 封裝： | P80C31SBAA<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html<1<week 44, 2004,;P80C31SBPN<SOT129-1 (DIP40)|<<http://www.nxp.com/packages/SOT129-1.html<1< |
| 文件頁數(shù)： | 23/32頁 |
| 文件大小： | 232K |
| 代理商： | P80C32SBAA |
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Philips Semiconductors
Product specification
80C31/80C32
80C51 8-bit microcontroller family
128/256 byte RAM ROMless low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
2000 Aug 07
23
AC ELECTRICAL CHARACTERISTICS
T
amb
= 0
°
C to +70
°
C or –40
°
C to +85
°
C, V
CC
= +2.7 V to +5.5 V, V
SS
= 0 V
1, 2, 3
16 MHz CLOCK
MIN
VARIABLE CLOCK
MIN
SYMBOL
1/t
CLCL
FIGURE
14
PARAMETER
MAX
MAX
UNIT
Oscillator frequency
5
Speed versions :S
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse width
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
3.5
16
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
LHLL
t
AVLL
t
LLAX
t
LLIV
t
LLPL
t
PLPH
t
PLIV
t
PXIX
t
PXIZ
t
AVIV4
t
PLAZ
Data Memory
t
RLRH
t
WLWH
t
RLDV
t
RHDX
t
RHDZ
t
LLDV
t
AVDV
t
LLWL
t
AVWL
t
QVWX
t
WHQX
t
QVWH
t
RLAZ
t
WHLH
External Clock
t
CHCX
t
CLCX
t
CLCH
t
CHCL
Shift Register
t
XLXL
t
QVXH
t
XHQX
t
XHDX
t
XHDV
NOTES:
1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
3. Interfacing the 80C31 and 80C32 to devices with float times up to 45ns is permitted. This limited bus contention will not cause damage to
Port 0 drivers.
4. See application note AN457 for external memory interface.
5. Parts are guaranteed to operate down to 0 Hz. When an external clock source is used, the RST pin should be held high for a minimum of
20
μ
s for power-on or wakeup from power down.
14
14
14
14
14
14
14
14
14
14
14
85
22
32
2t
CLCL
–40
t
CLCL
–40
t
CLCL
–30
150
4t
CLCL
–100
32
142
t
CLCL
–30
3t
CLCL
–45
82
3t
CLCL
–105
0
0
37
207
10
t
CLCL
–25
5t
CLCL
–105
10
15, 16
15, 16
15, 16
15, 16
15, 16
15, 16
15, 16
15, 16
15, 16
15, 16
15, 16
16
15, 16
15, 16
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data hold after WR
Data valid to WR high
RD low to address float
RD or WR high to ALE high
275
275
6t
CLCL
–100
6t
CLCL
–100
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
147
5t
CLCL
–165
0
0
65
350
397
239
2t
CLCL
–60
8t
CLCL
–150
9t
CLCL
–165
3t
CLCL
+50
137
122
13
13
287
3t
CLCL
–50
4t
CLCL
–130
t
CLCL
–50
t
CLCL
–50
7t
CLCL
–150
0
0
23
103
t
CLCL
–40
t
CLCL
+40
18
18
18
18
High time
Low time
Rise time
Fall time
20
20
20
20
t
CLCL
–t
CLCX
t
CLCL
–t
CHCX
20
20
ns
ns
ns
ns
20
20
17
17
17
17
17
Serial port clock cycle time
Output data setup to clock rising edge
Output data hold after clock rising edge
Input data hold after clock rising edge
Clock rising edge to input data valid
750
492
8
0
12t
CLCL
10t
CLCL
–133
2t
CLCL
–117
0
ns
ns
ns
ns
ns
492
10t
CLCL
–133
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P80C32SBAA,512 | 功能描述:8位微控制器 -MCU 80C51 256B 16MHZ ROMLESS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P80C32SBAA | 制造商:NXP Semiconductors 功能描述: |
| P80C32SBAA512 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 16MHZ LCC-44 |
| P80C32SBAA-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P80C32SBBB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit CMOS (low voltage, low power and high speed) microcontroller families |
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