
Lucent Technologies Inc.
Lucent Technologies Inc.
29
Preliminary Data Sheet
March 2000
ORCA ORT4622 FPSC
Four-Channel x 622 Mbits/s Backplane Transceiver
Memory Map
(continued)
Table 9
.
Memory Map
Notes:
1. Generic register block.
2. Device register block-Rx.
3. Device register block-Tx.
4. Top-level interrupts.
5. Rx control.
6. Tx control signals.
7. Per STS#1 cos flag.
8. Per channel interrupt.
9. Per STS-12 interrupt flags.
10.Per STS-1interrupt flags.
ADDR
[6:0]
Reg.
Type
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Default
Value
(hex)
Notes
Channel Register Block
(continued)
26, 3e,
56, 6e
isreg
—
—
—
—
—
elastic
store
overflow
flag
enable/mask register [2:0]
ais-p flag
per
STS-12
alarm flag
00
8
27, 3f,
57, 6f
28, 40,
58, 70
iereg
—
—
—
—
—
00
iareg
—
—
TOH
serial
input port
parity
error flag
input
parallel
bus
parity
error flag
LVDS link
B1 parity
error flag
LOF flag
Receiver
internal
path
parity
error flag
FIFO
aligner
threshold
error flag
00
9
29,41,
59, 71
2a, 42,
5a, 72
iereg
—
—
enable/mask register [5:0]
00
iareg
—
—
—
—
AIS
interrupt
flags 12
AIS
interrupt
flag 10
enable/
mask AIS
interrupt
flag 12
enable/
mask AIS
interrupt
flag 10
ES
overflow
flag 12
AIS
interrupt
flag 9
AIS
interrupt
flag 7
enable/
mask AIS
interrupt
flag 9
enable/
mask AIS
interrupt
flag 7
ES
overflow
flag 9
AIS
interrupt
flag 6
AIS
interrupt
flag 4
enable/
mask AIS
interrupt
flag 6
enable/
mask AIS
interrupt
flag 4
ES
overflow
flag 6
AIS
interrupt
flags 3
AIS
interrupt
flag 1
enable/
mask AIS
interrupt
flag 3
enable/
mask AIS
interrupt
flag 1
ES
overflow
flag 3
00
10
2b, 43,
5b, 73
iareg
AIS
interrupt
flag 11
—
AIS
interrupt
flag 8
—
AIS
interrupt
flag 5
—
AIS
interrupt
flag 2
—
00
2c, 44,
5c, 74
iereg
00
2d, 45,
5d, 75
iereg
enable/
mask AIS
interrupt
flag 11
—
enable/
mask AIS
interrupt
flag 8
—
enable/
mask AIS
interrupt
flag 5
—
enable/
mask AIS
interrupt
flag 2
—
00
2e, 46,
5e, 76
iareg
00