參數(shù)資料
型號(hào)： NRF9E5-EVKIT915
廠商： Electronic Theatre Controls, Inc.
英文描述： 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述： 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入，10位ADC
文件頁(yè)數(shù)： 50/104頁(yè)
文件大?。?/td> 1436K
代理商： NRF9E5-EVKIT915
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 50 of 104
June 2004
15.6
Interrupt Latency
Interrupt response time depends on the current state of the CPU. The fastest response
time is five instruction cycles: one to detect the interrupt, and four to perform the
LCALL to the ISR. The maximum latency (thirteen instruction cycles) occurs when the
CPU is currently executing an RETI instruction followed by a MUL or DIV instruction.
The thirteen instruction cycles in this case are: one to detect the interrupt, three to
complete the RETI, five to execute the DIV or MUL, and four to execute the LCALL to
the ISR.
For the maximum latency case, the response time is 13 x 4 = 52clock cycles.
15.7
Interrupt Latency from Power Down State.
The nRF9E5 may be set into Power Down state by writing a non zero value to SFR
0xB6, register CK_CTRL. The CPU will then perform a controlled shutdown of clock
and power regulator depending on what mode was selected. The system can only be
restarted from an RTC wakeup, a GPIO wakeup or a Watchdog reset. If a wakeup
interrupt is enabled, the startup time for regulators and clocks will be added to the
interrupt latency. See 17.2.1 Startup Time From Reset
15.8
Single-Step Operation
The nRF9E5 interrupt structure provides a way to perform single-step program
execution. When exiting an ISR with an RETI instruction, the CPU will always execute
at least one instruction of the task program. Therefore, once an ISR is entered, it cannot
be re-entered until at least one program instruction is executed. To perform single-step
execution, program one of the external interrupts (for example, INT0_N) to be level
sensitive and write an ISR for that interrupt that terminates as follows:
JNB TCON.1,$ ;
JB TCON.1,$ ;
RETI ;
wait for high on INT0_N
wait for low on INT0_N
return for ISR
The CPU enters the ISR when INT0_N goes low, then waits for a pulse on INT0_N.
Each time INT0_N is pulsed, the CPU exits the ISR, executes one program instruction,
then re-enters the ISR.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NRF9E5IC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
nRF9E5-REEL 功能描述:射頻收發(fā)器 433/868/915MHz TRNSCVR RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray
NRF-D 制造商:IDEC 功能描述:35mmDINKi[pT[Lbgz_ Bulk 制造商:IDEC CORPORATION 功能描述:DIN RAIL MT.ADAPTOR
NRF-HEAD-CAP-B 制造商:IDEC CORPORATION 功能描述:Circuit Protector
NRF-HEAD-CAP-W 制造商:IDEC CORPORATION 功能描述:Circuit Protector
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