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參數(shù)資料
| 型號： | NJU26175 |
| 廠商： | New Japan Radio Co., Ltd. |
| 英文描述： | NJU26100 Series Hardware Specification |
| 中文描述： | NJU26100系列硬件規(guī)格 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 270K |
| 代理商： | NJU26175 |
Ver.2005-02-24
NJU26100 Series
- 7 -
4. Audio Interface
The serial audio interface carries audio data to and from the NJU26100 Series. Industry standard serial data
formats of I
2
S, MSB-first left-justified or MSB-first right-justified are supported. These serial audio formats define a
pair of digital audio signals (stereo audio) on each data line. Two clock lines, BCK (bit clock) and LR (left/right word
clock) establish timing for serial data transfers.
The NJU26100 Series serial audio interface includes three data input lines, SDI0, SDI1 and SDI2, and three data
output lines, SDO0, SDO1 and SDO2, as shown in the figure below. The input serial data is selected by the
firmaware command. The number of these serial audio interfaces depends on the DSP function. Check the each
data sheet.
The NJU26100 Series has a pair of left/right clock lines (LRI and LRO) and a pair of bit clock lines (BCKI and
BCKO). Clock inputs BCKI and LRI are used to accept timing signals from an external device when the NJU26100
Series is operating in SLAVE clock mode.
The BCKO, LRO and MCK, system clock output, are provided for delta-sigma A/D and D/A converters when the
NJU26100 Series operates in MASTER mode. In SLAVE mode, the output of BCKO and LRO are the buffered
output of BCKI and LRI. The output of MCK is fixed to Low level in SLAVE mode.
NJU26100
BCKO
LRO
MCK
BCKI
LRI
Serial
Data
Outputs
Serial
Clock
Outputs
Serial
Clock
Inputs
Serial
Data
Inputs
System clock for
A/D, D/A converters
(DSP MASTER mode only)
SDO0
SDO1
SDO2
SDI0
SDI1
SDI2
Fig. 4-1 Serial Audio Interface
4.1 Audio Data Format
The NJU26100 Series can exchange data using any of three industry-standard digital audio data formats: I
2
S,
MSB-first Left-justified, or MSB-first Right-justified.
The three serial formats differ primarily in the placement of the audio data word relative to the LR clock.
Left-justified format places the most-significant data bit (MSB) as the first bit after an LR transition. I
2
S format places
the most-significant data bit (MSB) as the second bit after an LR transition (one bit delay relative to left-justified
format). Right-justified format places the least-significant data bit (LSB) as the last bit before an LR transition.
Clock LR (LRI, LRO) marks data word boundaries and clock BCK (BCKI, BCKO) clocks the transfer of serial
data bits. One period of LR defines a complete stereo audio sample and thus the rate of LR equals the audio
sample rate (Fs). All formats transmit the stereo sample left channel first. Note that polarity of LR is opposite in I
2
S
format (LR:LOW = Left channel data) compared to Left-Justified or Right-Justified formats.
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相關代理商/技術參數(shù) |
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| NJU26176 | 制造商:NJRC 制造商全稱:New Japan Radio 功能描述:NJU26100 Series Hardware Specification |
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| NJU26180 | 制造商:New Japan Radio Co Ltd (NJR/JRC) 功能描述: |
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