SMART CARD INTERFACE @ 2.7 V < VCC
參數(shù)資料
型號(hào)： NCN6001DTBR2G
廠商： ON Semiconductor
文件頁(yè)數(shù)： 2/36頁(yè)
文件大小： 0K
描述： IC INTERFACE SMART CARD 20TSSOP
標(biāo)準(zhǔn)包裝： 1
應(yīng)用： 智能卡
接口： 微控制器
電源電壓： 2.75 V ~ 5.5 V
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 標(biāo)準(zhǔn)包裝
安裝類型： 表面貼裝
其它名稱： NCN6001DTBR2GOSDKR
NCN6001
http://onsemi.com
10
SMART CARD INTERFACE @ 2.7 V < VCC < 5.5 V (25C to +85C ambient temperature, unless otherwise noted).
Note: Digital inputs undershoot < 0.3 V to ground, Digital inputs overshoot < 0.3 V to VCC.
Rating
Pin
Symbol
Min
Typ
Max
Unit
CRD_RST @ CRD_VCC = 1.8 V, 3.0 V, 5.0 V
Output RESET VOH @ Irst = 200 mA
Output RESET VOL @ Irst = 200 mA
Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @Cout = 30 pF
19
VOH
VOL
tR
tF
CRD_VCC 0.5
0
CRD_VCC
0.4
100
V
ns
CRD_CLK as a function of CRD_VCC
CRD_VCC = +5.0 V or 3.0 V or 1.8V
Output Frequency
Output VOH @ Icrd_clk = 200 mA
Output VOL @ Icrd_clk = 200 mA
CRD_CLK Output Duty Cycle
CRD_VCC = 5.0 V
CRD_VCC = 3.0 V
CRD_VCC = 1.8 V (Note 7)
Rise & Fall time @ CRD_VCC = 1.80 V to 5.0 V
Fast Mode
Output CRD_CLK Rise time @ Cout = 30 pF
Output CRD_CLK Fall time @ Cout = 30 pF
Rise & Fall time @ CRD_VCC = 1.80 V to 5.0 V
Slow Mode
Output CRD_CLK Rise time @ Cout = 30 pF
Output CRD_CLK Fall time @ Cout = 30 pF
17
FCRDCLK
VOH
VOL
FCRDDC
tress
tfcs
trills
tulsa
CRD_VCC – 0.5
0
45
40
2.1
1.9
11.5
10.8
20
CRD_VCC
+0.4
55
60
4
16
MHz
V
%
ns
CRD_IO @ CRD_VCC = 1.8 V 3.0 V, 5.0 V
CRD_IO Data Transfer Frequency
CRD_IO Rise time @ Cout = 30 pF
CRD_IO Fall time @ Cout = 30 pF
Output VOH @ Icrd_clk = 20 mA
Output VOL @ Icrd_clk = 500 mA, VIL = 0 V
20
FIO
tRIO
tFIO
VOH
VOL
CRD_VCC
0.5
0
400
0.8
CRD_VCC
0.4
kHz
ms
V
CRD_IO Pullup Resistor
20
RCRDPU
14
20
26
kW
CRD_C8 Output Rise and Fall Time @ Cout = 30 pF
14
tRC8, tFC8
100
ns
CRD_C4 Output Rise and Fall Time @ Cout = 30 pF
15
tRC4, tFC4
100
ns
CRD_C4 and CRD_C8 Data Transfer Frequency
14, 15
FC48
400
kHz
CRD_C8, CRD_C4 Output Voltages
High Level @ Irst = 200 mA
Low Level @ Irst = +200 mA
14, 15
VOH, VOL
CRD_VCC – 0.5
0
0.4
V
C8/S0 and C4/S0 Address Bias Current (Note 8)
14, 15
Ibc4c8
1.0
mA
Card Detection Digital Filter Delay:
Card Insertion
Card Extraction
18
TCRDIN
TCRDOFF
25
50
150
ms
Card Insertion or Extraction Positive Going Input High Voltage
18
VIHDET
0.70 * VCC
VCC
V
Card Insertion or Extraction Negative Going Input Low Voltage
18
VILDET
0
0.30 * VCC
V
Card Detection Bias Pullup Current @ VCC = 5.0 V
18
IDET
10
mA
Output Peak Max Current Under Card Static Operation
Mode @ CRD_VCC = 3.0 V or = 5.0 V
CRD_RST, CRD_IO, CRD_C4, CRD_C8
1, 20
Icrd_iorst
15
mA
Output Peak Max Current Under Card Static Operation
Mode @ CRD_VCC = 3.0 V or = 5.0 V
CRD_CLK
17
Icrd_clk
70
mA
7. Parameter guaranteed by design, function 100% production tested.
8. Depending upon the environment, using and external pullup resistor might be necessary to cope with PCB surface leakage current.
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