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參數(shù)資料
| 型號： | NAND512W4A0AV1 |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 32M X 16 FLASH 3V PROM, 35 ns, PDSO48 |
| 封裝： | 12 X 17 MM, 0.65 MM HEIGHT, PLASTIC, USOP-48 |
| 文件頁數(shù)： | 10/57頁 |
| 文件大?。?/td> | 916K |
| 代理商： | NAND512W4A0AV1 |
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NAND128-A, NAND256-A, NAND512-A, NAND01G-A
18/57
Table 6. Address Insertion, x8 Devices
Note: 1. A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.
2. Any additional address input cycles will be ignored.
3. The 4th cycle is only required for 512Mb and 1Gb devices.
Table 7. Address Insertion, x16 Devices
Note: 1. A8 is Don’t Care in x16 devices.
2. Any additional address input cycles will be ignored.
3. The 01h Command is not used in x16 devices.
4. The 4th cycle is only required for 512Mb and 1Gb devices.
Table 8. Address Definitions
Bus Cycle
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
1st
A7
A6
A5
A4
A3
A2
A1
A0
2nd
A16
A15
A14
A13
A12
A11
A10
A9
3rd
A24
A23
A22
A21
A20
A19
A18
A17
4th(4)
VIL
A26
A25
Bus
Cycle
I/O8-
I/O15
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
1st
X
A7
A6
A5
A4
A3
A2
A1
A0
2nd
X
A16
A15
A14
A13
A12
A11
A10
A9
3rd
X
A24
A23
A22
A21
A20
A19
A18
A17
4th(4)
X
VIL
A26
A25
Address
Definition
A0 - A7
Column Address
A9 - A26
Page Address
A9 - A13
Address in Block
A14 - A26
Block Address
A8
A8 is set Low or High by the 00h or 01h Command, and is
Don’t Care in x16 devices
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