參數(shù)資料
型號(hào)： NAND512R3A2CZA6T
廠商： 意法半導(dǎo)體
英文描述： 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
中文描述： 128兆，256兆，512兆位，1千兆位（x8/x16）528 Byte/264字的頁(yè)面，1.8V/3V，NAND閃存芯片
文件頁(yè)數(shù)： 25/57頁(yè)
文件大?。?/td> 410K
代理商： NAND512R3A2CZA6T
25/57
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Page Program
The Page Program operation is the standard oper-
ation to program data to the memory array.
The main area of the memory array is pro-
grammed by page, however partial page program-
ming is allowed where any number of bytes (1 to
528) or words (1 to 264) can be programmed.
The maximum number of consecutive partial page
program operations allowed in the same page is
three. After exceeding this a Block Erase com-
mand must be issued before any further program
operations can take place in that page.
Before starting a Page Program operation a Point-
er operation can be performed to point to the area
to be programmed. Refer to the
Pointer Opera-
tions
section and
Figure 12.
for details.
Each Page Program operation consists of five
steps (see
Figure 17.
):
1.
one bus cycle is required to setup the Page
Program command
2.
four bus cycles are then required to input the
program address (refer to
Table 6.
)
3.
the data is then input (up to 528 Bytes/ 264
Words) and loaded into the Page Buffer
one bus cycle is required to issue the confirm
command to start the P/E/R Controller.
The P/E/R Controller then programs the data
into the array.
Once the program operation has started the Sta-
tus Register can be read using the Read Status
Register command. During program operations
the Status Register will only flag errors for bits set
to '1' that have not been successfully programmed
to '0'.
During the program operation, only the Read Sta-
tus Register and Reset commands will be accept-
ed, all other commands will be ignored.
Once the program operation has completed the P/
E/R Controller bit SR6 is set to ‘1’ and the Ready/
Busy signal goes High.
The device remains in Read Status Register mode
until another valid command is written to the Com-
mand Interface.
4.
5.
Figure 17. Page Program Operation
Note: Before starting a Page Program operation a Pointer operation can be performed. Refer to
Pointer Operations
section for details.
I/O
RB
Address Inputs
SR0
ai07566
Data Input
10h
70h
80h
Page Program
Setup Code
Confirm
Code
Read Status Register
Busy
(Program Busy time)
相關(guān)PDF資料
PDF描述
NAND512R4A0CZA1 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A0CZA1T 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND128W3A0CZB1 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512W4M5CZC5E 256/512Mb/1Gb (x8/x16, 1.8/3V, 528 Byte Page) NAND Flash Memories 256/512Mb (x16/x32, 1.8V) LPSDRAM, MCP
NAND512R4M2CZB5E 256/512Mb/1Gb (x8/x16, 1.8/3V, 528 Byte Page) NAND Flash Memories 256/512Mb (x16/x32, 1.8V) LPSDRAM, MCP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NAND512R3A2DDI6 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
NAND512R3A2DZA6E 功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR)
NAND512R3A2SE06 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
NAND512R3A2SN6E 制造商:Micron Technology Inc 功能描述:NAND - Trays
NAND512R3A2SN6F 制造商:Micron Technology Inc 功能描述:NAND - Tape and Reel
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