參數(shù)資料
型號(hào): NAND01GR4B2CV6T
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 64M X 16 FLASH 1.8V PROM, 25000 ns, PDSO48
封裝: 12 X 17 MM, 0.65 MM HEIGHT, PLASTIC, USOP-48
文件頁數(shù): 22/58頁
文件大?。?/td> 943K
代理商: NAND01GR4B2CV6T
29/58
NAND512-B, NAND01G-B, NAND02G-B, NAND04G-B, NAND08G-B
Table 13. Status Register Bits
Note: 1. The SR6 bit and SR0 bit have a different meaning during Cache Program and Cache Read operations.
2. Only valid for Cache Program operations, for other operations it is same as SR6.
3. Only valid for Cache Program operations, for other operations it is Don’t Care.
Bit
Name
Logic Level
Definition
SR7
Write Protection
'1'
Not Protected
'0'
Protected
SR6(1)
Program/ Erase/ Read
Controller
'1'
P/E/R C inactive, device ready
'0'
P/E/R C active, device busy
Cache Ready/Busy
'1'
Cache Register ready (Cache Program only)
'0'
Cache Register busy (Cache Program only)
SR5
Program/ Erase/ Read
Controller(2)
'1'
P/E/R C inactive, device ready
'0'
P/E/R C active, device busy
SR4, SR3, SR2
Reserved
Don’t Care
SR1
Cache Program Error(3)
'1'
Page N-1 failed in Cache Program operation
'0'
Page N-1 programmed successfully
SR0(1)
Generic Error
‘1’
Error – operation failed
‘0’
No Error – operation successful
Cache Program Error
‘1’
Page N failed in Cache Program operation
‘0’
Page N programmed successfully
相關(guān)PDF資料
PDF描述
NAND01GR4B2CZA1E 64M X 16 FLASH 1.8V PROM, 25000 ns, PBGA63
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