參數(shù)資料
型號: MX7705EWE+T
廠商: Maxim Integrated Products
文件頁數(shù): 8/33頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 2CH 16-SOIC
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1,000
位數(shù): 16
采樣率(每秒): 500
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 16-SOIC W
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個差分,單極
MX7705
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADC
16
______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
SCLK
Serial Clock Input. Apply an external serial clock to transfer data to and from the device at data rates
of up to 5MHz.
2
CLKIN
Clock Input. Connect a crystal/resonator between CLKIN and CLKOUT, or drive CLKIN externally with
a CMOS-compatible clock source with CLKOUT left unconnected.
3
CLKOUT
Clock Output. Connect a crystal/resonator between CLKIN and CLKOUT. When enabled, CLKOUT
provides a CMOS-compatible, inverted clock output. Set CLKDIS = 0 in the clock register to enable
CLKOUT. Set CLKDIS = 1 in the clock register to disable CLKOUT to conserve power.
4
CS
Active-Low Chip-Select Input.
CS selects the active device in systems with more than one device on
the serial bus. Drive
CS low to clock data in on DIN and to clock data out on DOUT. When CS is high,
DOUT is high impedance. Connect
CS to GND for 3-wire operation.
5
RESET
Active-Low Reset Input. Drive
RESET low to reset the MX7705 to power-on reset status.
6
AIN2+
Channel 2 Positive Differential Analog Input
7
AIN1+
Channel 1 Positive Differential Analog Input
8
AIN1-
Channel 1 Negative Differential Analog Input
9
REF+
Positive Differential Reference Input
10
REF-
Negative Differential Reference Input
11
AIN2-
Channel 2 Negative Differential Analog Input
12
DRDY
Active-Low Data-Ready Output.
DRDY goes low when a new conversion result is available in the data
register. When a read-operation of a full output word completes,
DRDY returns high.
13
DOUT
Serial Data Output. DOUT outputs serial data from the data register. DOUT changes on the falling
edge of SCLK and is valid on the rising edge of SCLK. When
CS is high, DOUT is high impedance.
14
DIN
Serial Data Input. Data on DIN is clocked in on the rising edge of SCLK when
CS is low.
15
VDD
Power Input
16
GND
Ground
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